NBTI and CHC are two leading reliability concerns. Their degradation rate, which is represented by the time exponent (n), varies with multiple factors, such as the measurement method and bias voltages (i.e., different n for sub-threshold or linear current). Such a variation significantly affects the long-term prediction of circuit lifetime. By investigating the underlying mechanisms and silicon data, we conclude that the bias dependence is due to intrinsic device non-linearity. With a unified aging model of threshold voltage (Vth) shift, different time exponents in different operation regions are consistently explained. The proposed solution captures the change of n under various supply voltages (Vdd), as validated with silicon data from transistors and RO measurement. It helps improve the accuracy in reliability prediction, reducing unnecessary design margins. Based on the result, the device and circuit lifetime is expected to be enhanced operating at lower V dd due to the reduction in the time exponent.