On-chip communication architecture exploration: A quantitative evaluation of point-to-point, bus, and network-on-chip approaches

Hyung Gyu Lee, Naehyuck Chang, Umit Y. Ogras, Radu Marculescu

Research output: Contribution to journalArticle

164 Scopus citations

Abstract

Traditionally, design-space exploration for systems-on-chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, a shift from computation-based to communication-based design becomes mandatory. As a result, the communication architecture plays a major role in the area, performance, and energy consumption of the overall system. This article presents a comprehensive evaluation of three on-chip communication architectures targeting multimedia applications. Specifically, we compare and contrast the network-on-chip (NoC) with point-to-point (P2P) and bus-based communication architectures in terms of area, performance, and energy consumption. As the main contribution, we present complete P2P, bus-, and NoC-based implementations of a real multimedia application (i. e. the MPEG-2 encoder), and provide direct measurements using an FPGA prototype and actual video clips, rather than simulation and synthetic workloads. We also support the experimental findings through a theoretical analysis. Both experimental and analysis results show that the NoC architecture scales very well in terms of area, performance, energy, and design effort, while the P2P and bus-based architectures scale poorly on all accounts except for performance and area, respectively.

Original languageEnglish (US)
Article number1255460
JournalACM Transactions on Design Automation of Electronic Systems
Volume12
Issue number3
DOIs
StatePublished - Aug 1 2007
Externally publishedYes

Keywords

  • FPGA prototype
  • MPEG-2 encoder
  • Networks-on-chip
  • Point-to-point
  • System-on-chip

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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