Novel voltage step stress (VSS) technique for fast lifetime prediction of hot carrier degradation

Xixiang Feng; Pengpeng Ren; Zhigang Ji; Runsheng Wang; Ketul B. Sutaria; Yu Cao; Ru Huang

doi:10.1109/ICSICT.2014.7021226

Novel voltage step stress (VSS) technique for fast lifetime prediction of hot carrier degradation

Xixiang Feng, Pengpeng Ren, Zhigang Ji, Runsheng Wang, Ketul B. Sutaria, Yu Cao, Ru Huang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Scopus citations

Abstract

Hot carrier injection (HCI) is one of the critical de-vice degradation mechanisms, and is conventionally characterized with constant voltage stress (CVS) method. A novel voltage-step stress (VSS) methodology is pro-posed to quickly characterize HCI degradation, based on a simplified reaction-diffusion model. This wafer-level reliability qualification methodology for HCI requires only one single device, and the total test time can be con-trolled within 2 hours. Therefore, this new technique can be an effective tool for fast reliability screening for HCI during process development in the future.

Original language	English (US)
Title of host publication	Proceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Print)	9781479932962
DOIs	https://doi.org/10.1109/ICSICT.2014.7021226
State	Published - Jan 23 2014
Event	2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014 - Guilin, China Duration: Oct 28 2014 → Oct 31 2014

Other

Other	2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
Country/Territory	China
City	Guilin
Period	10/28/14 → 10/31/14

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering
Computer Science Applications

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10.1109/ICSICT.2014.7021226

Cite this

Feng, X., Ren, P., Ji, Z., Wang, R., Sutaria, K. B., Cao, Y., & Huang, R. (2014). Novel voltage step stress (VSS) technique for fast lifetime prediction of hot carrier degradation. In Proceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014 [7021226] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICSICT.2014.7021226

Novel voltage step stress (VSS) technique for fast lifetime prediction of hot carrier degradation. / Feng, Xixiang; Ren, Pengpeng; Ji, Zhigang et al.
Proceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014. Institute of Electrical and Electronics Engineers Inc., 2014. 7021226.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Feng, X, Ren, P, Ji, Z, Wang, R, Sutaria, KB, Cao, Y & Huang, R 2014, Novel voltage step stress (VSS) technique for fast lifetime prediction of hot carrier degradation. in Proceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014., 7021226, Institute of Electrical and Electronics Engineers Inc., 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014, Guilin, China, 10/28/14. https://doi.org/10.1109/ICSICT.2014.7021226

Feng X, Ren P, Ji Z, Wang R, Sutaria KB, Cao Y et al. Novel voltage step stress (VSS) technique for fast lifetime prediction of hot carrier degradation. In Proceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014. Institute of Electrical and Electronics Engineers Inc. 2014. 7021226 doi: 10.1109/ICSICT.2014.7021226

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title = "Novel voltage step stress (VSS) technique for fast lifetime prediction of hot carrier degradation",

abstract = "Hot carrier injection (HCI) is one of the critical de-vice degradation mechanisms, and is conventionally characterized with constant voltage stress (CVS) method. A novel voltage-step stress (VSS) methodology is pro-posed to quickly characterize HCI degradation, based on a simplified reaction-diffusion model. This wafer-level reliability qualification methodology for HCI requires only one single device, and the total test time can be con-trolled within 2 hours. Therefore, this new technique can be an effective tool for fast reliability screening for HCI during process development in the future.",

author = "Xixiang Feng and Pengpeng Ren and Zhigang Ji and Runsheng Wang and Sutaria, {Ketul B.} and Yu Cao and Ru Huang",

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booktitle = "Proceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014",

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AU - Feng, Xixiang

AU - Ren, Pengpeng

AU - Ji, Zhigang

AU - Wang, Runsheng

AU - Sutaria, Ketul B.

AU - Cao, Yu

AU - Huang, Ru

PY - 2014/1/23

Y1 - 2014/1/23

N2 - Hot carrier injection (HCI) is one of the critical de-vice degradation mechanisms, and is conventionally characterized with constant voltage stress (CVS) method. A novel voltage-step stress (VSS) methodology is pro-posed to quickly characterize HCI degradation, based on a simplified reaction-diffusion model. This wafer-level reliability qualification methodology for HCI requires only one single device, and the total test time can be con-trolled within 2 hours. Therefore, this new technique can be an effective tool for fast reliability screening for HCI during process development in the future.

AB - Hot carrier injection (HCI) is one of the critical de-vice degradation mechanisms, and is conventionally characterized with constant voltage stress (CVS) method. A novel voltage-step stress (VSS) methodology is pro-posed to quickly characterize HCI degradation, based on a simplified reaction-diffusion model. This wafer-level reliability qualification methodology for HCI requires only one single device, and the total test time can be con-trolled within 2 hours. Therefore, this new technique can be an effective tool for fast reliability screening for HCI during process development in the future.

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BT - Proceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014

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Novel voltage step stress (VSS) technique for fast lifetime prediction of hot carrier degradation

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