This paper presents two novel sorting network-based architectures for computing high sample rate nonrecursive rank order filters. The proposed architectures consist of significantly fewer comparators than existing sorting network-based architectures that are based on bubble-sort and Batcher’s odd-even merge sort. The reduction in the number of comparators is obtained by sorting the columns of the window only once, and by merging the sorted columns in a way such that the number of candidate elements for the output is very small. The number of comparators per output is reduced even further by processing a block of outputs at a time. Block processing procedures that exploit the computational overlap between consecutive windows are developed for both the proposed networks.
|Original language||English (US)|
|Number of pages||6|
|Journal||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|State||Published - Dec 1994|
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering