Novel sorting network-based architectures for rank order filters

Research output: Contribution to journalArticle

21 Citations (Scopus)

Abstract

This paper presents two novel sorting network-based architectures for computing high sample rate nonrecursive rank order filters. The proposed architectures consist of significantly fewer comparators than existing sorting network-based architectures that are based on bubble-sort and Batcher's odd-even merge sort. The reduction in the number of comparators is obtained by sorting the columns of the window only once, and by merging the sorted columns in a way such that the number of candidate elements for the output is very small. The number of comparators per output is reduced even further by processing a block of outputs at a time. Block processing procedures that exploit the computational overlap between consecutive windows are developed for both the proposed networks.

Original languageEnglish (US)
Pages (from-to)502-507
Number of pages6
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume2
Issue number4
DOIs
StatePublished - Dec 1994

Fingerprint

Sorting
Processing
Merging

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Novel sorting network-based architectures for rank order filters. / Chakrabarti, Chaitali; Wang, Li Yu.

In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 2, No. 4, 12.1994, p. 502-507.

Research output: Contribution to journalArticle

@article{38edda51f0a747e2beed3fa5449f4294,
title = "Novel sorting network-based architectures for rank order filters",
abstract = "This paper presents two novel sorting network-based architectures for computing high sample rate nonrecursive rank order filters. The proposed architectures consist of significantly fewer comparators than existing sorting network-based architectures that are based on bubble-sort and Batcher's odd-even merge sort. The reduction in the number of comparators is obtained by sorting the columns of the window only once, and by merging the sorted columns in a way such that the number of candidate elements for the output is very small. The number of comparators per output is reduced even further by processing a block of outputs at a time. Block processing procedures that exploit the computational overlap between consecutive windows are developed for both the proposed networks.",
author = "Chaitali Chakrabarti and Wang, {Li Yu}",
year = "1994",
month = "12",
doi = "10.1109/92.335027",
language = "English (US)",
volume = "2",
pages = "502--507",
journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",
issn = "1063-8210",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "4",

}

TY - JOUR

T1 - Novel sorting network-based architectures for rank order filters

AU - Chakrabarti, Chaitali

AU - Wang, Li Yu

PY - 1994/12

Y1 - 1994/12

N2 - This paper presents two novel sorting network-based architectures for computing high sample rate nonrecursive rank order filters. The proposed architectures consist of significantly fewer comparators than existing sorting network-based architectures that are based on bubble-sort and Batcher's odd-even merge sort. The reduction in the number of comparators is obtained by sorting the columns of the window only once, and by merging the sorted columns in a way such that the number of candidate elements for the output is very small. The number of comparators per output is reduced even further by processing a block of outputs at a time. Block processing procedures that exploit the computational overlap between consecutive windows are developed for both the proposed networks.

AB - This paper presents two novel sorting network-based architectures for computing high sample rate nonrecursive rank order filters. The proposed architectures consist of significantly fewer comparators than existing sorting network-based architectures that are based on bubble-sort and Batcher's odd-even merge sort. The reduction in the number of comparators is obtained by sorting the columns of the window only once, and by merging the sorted columns in a way such that the number of candidate elements for the output is very small. The number of comparators per output is reduced even further by processing a block of outputs at a time. Block processing procedures that exploit the computational overlap between consecutive windows are developed for both the proposed networks.

UR - http://www.scopus.com/inward/record.url?scp=0028710965&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0028710965&partnerID=8YFLogxK

U2 - 10.1109/92.335027

DO - 10.1109/92.335027

M3 - Article

AN - SCOPUS:0028710965

VL - 2

SP - 502

EP - 507

JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

SN - 1063-8210

IS - 4

ER -