New generation of predictive technology model for sub-45nm design exploration

Wei Zhao, Yu Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

382 Scopus citations

Abstract

Predictive MOSFET model is critical for early circuit design research. To accurately predict the characteristics of nanoscale CMOS, emerging physical effects, such as process variations and physical correlations among model parameters, must be included. In addition, predictions across technology generations should be smooth to make continuous extrapolations. In this work, a new generation of predictive technology model (PTM) is developed to accomplish these goals. Based on physical models and early stage silicon data, PTM of bulk CMOS for 130nm to 32nm technology nodes is successfully generated. By tuning ten parameters, PTM can be easily customized to cover a wide range of process uncertainties. The accuracy of PTM predictions is comprehensively verified: for NMOS, the error of I/sub on/ is 2% and for PMOS, it is 5%. Furthermore, the new PTM correctly captures process sensitivities in the nanometer regime. A webpage has been established for the release of PTM (http://www.eas.asu.edu//spl sim/ptm).

Original languageEnglish (US)
Title of host publicationProceedings - 7th International Symposium on Quality Electronic Design, ISQED 2006
Pages585-590
Number of pages6
DOIs
StatePublished - 2006
Event7th International Symposium on Quality Electronic Design, ISQED 2006 - San Jose, CA, United States
Duration: Mar 27 2006Mar 29 2006

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other7th International Symposium on Quality Electronic Design, ISQED 2006
Country/TerritoryUnited States
CitySan Jose, CA
Period3/27/063/29/06

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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