Near-planar monolithic integration of GaAs FETs and LEDs with use of a thermal oxide isolation (TOI) layer

C. B. Wheeler; S. Daryanani; Yong-Hang Zhang

Near-planar monolithic integration of GaAs FETs and LEDs with use of a thermal oxide isolation (TOI) layer

C. B. Wheeler, S. Daryanani, Yong-Hang Zhang

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A new integration method that relies on the thermal oxidation of AlAs to form a buried current confining and isolation layer for light emitting device (LED) and field effect transistors (FET) is presented. The buried oxide layer is situated under the FET channel such that the transistor is effectively stacked on top of the LED (or VCSEL). The oxide layer is also used to form a current injection aperture in the LED and directs current flow vertically through this device. With this proposed method, there is the possibility of integrating GaAs FETs and vertical cavity surface emitting lasers (VCELs) photodetectors on the same chip.

Original language	English (US)
Title of host publication	Conference Proceedings - Lasers and Electro-Optics Society Annual Meeting-LEOS
Editors	Anon
Publisher	IEEE
Pages	259-260
Number of pages	2
Volume	11
State	Published - 1997
Event	Proceedings of the 1997 Conference on Lasers and Electro-Optics, CLEO - Baltimore, MD, USA Duration: May 18 1997 → May 23 1997

Other

Other	Proceedings of the 1997 Conference on Lasers and Electro-Optics, CLEO
City	Baltimore, MD, USA
Period	5/18/97 → 5/23/97

ASJC Scopus subject areas

Control and Systems Engineering
Electrical and Electronic Engineering
Industrial and Manufacturing Engineering

Cite this

Near-planar monolithic integration of GaAs FETs and LEDs with use of a thermal oxide isolation (TOI) layer. / Wheeler, C. B.; Daryanani, S.; Zhang, Yong-Hang.
Conference Proceedings - Lasers and Electro-Optics Society Annual Meeting-LEOS. ed. / Anon. Vol. 11 IEEE, 1997. p. 259-260.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Wheeler, CB, Daryanani, S & Zhang, Y-H 1997, Near-planar monolithic integration of GaAs FETs and LEDs with use of a thermal oxide isolation (TOI) layer. in Anon (ed.), Conference Proceedings - Lasers and Electro-Optics Society Annual Meeting-LEOS. vol. 11, IEEE, pp. 259-260, Proceedings of the 1997 Conference on Lasers and Electro-Optics, CLEO, Baltimore, MD, USA, 5/18/97.

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abstract = "A new integration method that relies on the thermal oxidation of AlAs to form a buried current confining and isolation layer for light emitting device (LED) and field effect transistors (FET) is presented. The buried oxide layer is situated under the FET channel such that the transistor is effectively stacked on top of the LED (or VCSEL). The oxide layer is also used to form a current injection aperture in the LED and directs current flow vertically through this device. With this proposed method, there is the possibility of integrating GaAs FETs and vertical cavity surface emitting lasers (VCELs) photodetectors on the same chip.",

author = "Wheeler, {C. B.} and S. Daryanani and Yong-Hang Zhang",

year = "1997",

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pages = "259--260",

editor = "Anon",

booktitle = "Conference Proceedings - Lasers and Electro-Optics Society Annual Meeting-LEOS",

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AU - Wheeler, C. B.

AU - Daryanani, S.

AU - Zhang, Yong-Hang

PY - 1997

Y1 - 1997

N2 - A new integration method that relies on the thermal oxidation of AlAs to form a buried current confining and isolation layer for light emitting device (LED) and field effect transistors (FET) is presented. The buried oxide layer is situated under the FET channel such that the transistor is effectively stacked on top of the LED (or VCSEL). The oxide layer is also used to form a current injection aperture in the LED and directs current flow vertically through this device. With this proposed method, there is the possibility of integrating GaAs FETs and vertical cavity surface emitting lasers (VCELs) photodetectors on the same chip.

AB - A new integration method that relies on the thermal oxidation of AlAs to form a buried current confining and isolation layer for light emitting device (LED) and field effect transistors (FET) is presented. The buried oxide layer is situated under the FET channel such that the transistor is effectively stacked on top of the LED (or VCSEL). The oxide layer is also used to form a current injection aperture in the LED and directs current flow vertically through this device. With this proposed method, there is the possibility of integrating GaAs FETs and vertical cavity surface emitting lasers (VCELs) photodetectors on the same chip.

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M3 - Conference contribution

AN - SCOPUS:0030714290

VL - 11

SP - 259

EP - 260

BT - Conference Proceedings - Lasers and Electro-Optics Society Annual Meeting-LEOS

A2 - Anon, null

PB - IEEE

T2 - Proceedings of the 1997 Conference on Lasers and Electro-Optics, CLEO

Y2 - 18 May 1997 through 23 May 1997

ER -

Near-planar monolithic integration of GaAs FETs and LEDs with use of a thermal oxide isolation (TOI) layer

Abstract

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ASJC Scopus subject areas

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