TY - GEN
T1 - Multi-resolution Co-design modeling
T2 - 2016 Winter Simulation Conference, WSC 2016
AU - Gholami, Soroosh
AU - Sarjoughian, Hessam
PY - 2016/7/2
Y1 - 2016/7/2
N2 - This paper proposes a multi-resolution co-design modeling approach where hardware and software parts of systems are loosely represented and composable. This approach is shown for Network-on-Chips (NoC) where the network software directs communications among switches, links, and interfaces. The complexity of such systems can be better tamed by modeling frameworks for which multi-resolution model abstractions along system's hardware and software dimensions are separately specified. Such frameworks build on hierarchical, component-based modeling principles and methods. Hybrid model composition establishes relationships across models while multi-resolution models can be better specified by separately accounting for multiple levels of hardware and software abstractions. For Network-on-Chip, the abstraction levels are interface, capacity, flit, and hardware with resolutions defined in terms of object, temporal, process, and spatial aspects. The proposed modeling approach benefits from co-design and multi-resolution modeling in order to better manage rich dynamics of hardware and software parts of systems and their network-based interactions.
AB - This paper proposes a multi-resolution co-design modeling approach where hardware and software parts of systems are loosely represented and composable. This approach is shown for Network-on-Chips (NoC) where the network software directs communications among switches, links, and interfaces. The complexity of such systems can be better tamed by modeling frameworks for which multi-resolution model abstractions along system's hardware and software dimensions are separately specified. Such frameworks build on hierarchical, component-based modeling principles and methods. Hybrid model composition establishes relationships across models while multi-resolution models can be better specified by separately accounting for multiple levels of hardware and software abstractions. For Network-on-Chip, the abstraction levels are interface, capacity, flit, and hardware with resolutions defined in terms of object, temporal, process, and spatial aspects. The proposed modeling approach benefits from co-design and multi-resolution modeling in order to better manage rich dynamics of hardware and software parts of systems and their network-based interactions.
UR - http://www.scopus.com/inward/record.url?scp=85014244464&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85014244464&partnerID=8YFLogxK
U2 - 10.1109/WSC.2016.7822201
DO - 10.1109/WSC.2016.7822201
M3 - Conference contribution
AN - SCOPUS:85014244464
T3 - Proceedings - Winter Simulation Conference
SP - 1499
EP - 1510
BT - 2016 Winter Simulation Conference
A2 - Roeder, Theresa M.
A2 - Frazier, Peter I.
A2 - Szechtman, Robert
A2 - Zhou, Enlu
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 11 December 2016 through 14 December 2016
ER -