The growth of leakage at an exponential rate has made it as important as delay in the design of nanometer scale circuits. Traditional single-attribute optimization problems force a designer to choose either power or delay as the objective function and minimize it with constraints on other attributes. However this approach does not provide the designer with enough freedom to incorporate trade-offs between various attributes such as leakage and delay. The only approach (although rigid) that does provides such a trade-off is the minimization of energy-delay product (EDP). In this paper we present a utility theoretic approach for the joint optimization of leakage and delay. This provides a general framework for quantifying a designer's preferences for trade-offs between leakage and delay. We show that EDP is an element of a larger class of such utility functions. The resulting multi-attribute optimization problem is modeled as a convex gate sizing problem that is solved exactly using Geometric Programming. The resulting solution gives a design point that is optimal with respect to the designer's preferences.
- Circuit optimization
ASJC Scopus subject areas
- Electrical and Electronic Engineering