TY - GEN
T1 - Monolithic integration of GaAs optoelectronic devices using thermal oxide isolation (TOI)
AU - Wheeler, Charles B.
AU - Daryanani, Sonu L.
AU - Shen, Jun
AU - Zhang, Yong-Hang
N1 - Copyright:
Copyright 2004 Elsevier Science B.V., Amsterdam. All rights reserved.
PY - 1997
Y1 - 1997
N2 - A novel integration method is described that relies on the thermal oxidation of AlAs to form a buried current blocking layer. This integration technology, called thermal oxidation isolation (TOI), is an extension of recent work involving oxidized VCSELs. However, in addition to incorporating a conventional thermal oxide current aperture to define VCSEL active regions, a buried oxide layer is also used to provide inter-device isolation. As a demonstration of this concept, a GaAs MESFET and resonant cavity LED are integrated and characterized. The buried oxide layer is situated under the FET channel such that the transistor is effectively stacked on top of the LED. The oxide layer is also used to form a current aperture in the LED and directs current flow vertically through this device. Solid-source MBE is used to grow the device layers on a p-type GaAs substrate. The epitaxial structure consists of a p-type bottom mirror consisting of 24.5 pairs of alternating AlAs and GaAs quarter-wave layers, an undoped one-wave active region containing 3 multiplied by 80 angstrom InGaAs quantum wells and a single n-type AlAs/GaAs top mirror period. The fabrication sequence, described in some detail, is straightforward. A wet etch is used to define one mesa for the LED and a second for the MESFET. The top AlAs layer, exposed at the mesa periphery by this etch, is oxidized at 410 degrees. Celsius in a steam ambient to form the current- guiding regions. A conventional MESFET fabrication sequence is then used to complete the transistor and form the LED cathode (which is connected to the FET drain). A back contact is then deposited to form the LED anode. In all, five mask levels are used to fabricate the integrated FET/LED (or VCSEL) structure. Functionality of these prototype devices is demonstrated by dc and modulation measurements. The MESFET gate length and width are 3 micrometer and 100 micrometer, respectively. The transistor operated in the depletion mode with a typical Idss of 8 mA and a maximum transconductance of 35 mS/mm. The LED wavelength is about 990 nm and has output power in the μW range when driven by the MESFET.
AB - A novel integration method is described that relies on the thermal oxidation of AlAs to form a buried current blocking layer. This integration technology, called thermal oxidation isolation (TOI), is an extension of recent work involving oxidized VCSELs. However, in addition to incorporating a conventional thermal oxide current aperture to define VCSEL active regions, a buried oxide layer is also used to provide inter-device isolation. As a demonstration of this concept, a GaAs MESFET and resonant cavity LED are integrated and characterized. The buried oxide layer is situated under the FET channel such that the transistor is effectively stacked on top of the LED. The oxide layer is also used to form a current aperture in the LED and directs current flow vertically through this device. Solid-source MBE is used to grow the device layers on a p-type GaAs substrate. The epitaxial structure consists of a p-type bottom mirror consisting of 24.5 pairs of alternating AlAs and GaAs quarter-wave layers, an undoped one-wave active region containing 3 multiplied by 80 angstrom InGaAs quantum wells and a single n-type AlAs/GaAs top mirror period. The fabrication sequence, described in some detail, is straightforward. A wet etch is used to define one mesa for the LED and a second for the MESFET. The top AlAs layer, exposed at the mesa periphery by this etch, is oxidized at 410 degrees. Celsius in a steam ambient to form the current- guiding regions. A conventional MESFET fabrication sequence is then used to complete the transistor and form the LED cathode (which is connected to the FET drain). A back contact is then deposited to form the LED anode. In all, five mask levels are used to fabricate the integrated FET/LED (or VCSEL) structure. Functionality of these prototype devices is demonstrated by dc and modulation measurements. The MESFET gate length and width are 3 micrometer and 100 micrometer, respectively. The transistor operated in the depletion mode with a typical Idss of 8 mA and a maximum transconductance of 35 mS/mm. The LED wavelength is about 990 nm and has output power in the μW range when driven by the MESFET.
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M3 - Conference contribution
AN - SCOPUS:0031373539
SN - 0819424145
T3 - Proceedings of SPIE - The International Society for Optical Engineering
SP - 75
EP - 84
BT - Proceedings of SPIE - The International Society for Optical Engineering
A2 - Choquette, Kent D.
A2 - Deppe, Dennis G.
PB - Society of Photo-Optical Instrumentation Engineers
T2 - Vertical-Cavity Surface-Emitting Lasers
Y2 - 13 February 1997 through 14 February 1997
ER -