Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition

Kyungwook Chang, Deepak Kadetotad, Yu Cao, Jae-sun Seo, Sung Kyu Lim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

In recent years, deep learning has become widespread for various real-world recognition tasks. In addition to recognition accuracy, energy efficiency is another grand challenge to enable local intelligence in edge devices. In this paper, we investigate the adoption of monolithic 3D IC (M3D) technology for deep learning hardware design, using speech recognition as a test vehicle. M3D has recently proven to be one of the leading contenders to address the power, performance and area (PPA) scaling challenges in advanced technology nodes. Our study encompasses the influence of key parameters in DNN hardware implementations towards energy efficiency, including DNN architectural choices, underlying workloads, and tier partitioning choices in M3D. Our post-layout M3D designs, together with hardware-efficient sparse algorithms, produce power savings beyond what can be achieved using conventional 2D ICs. Experimental results show that M3D offers 22.3% iso-performance power saving, convincingly demonstrating its entitlement as a solution for DNN ASICs. We further present architectural guidelines for M3D DNNs to maximize the power saving.

Original languageEnglish (US)
Title of host publicationISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509060238
DOIs
StatePublished - Aug 11 2017
Event22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017 - Taipei, Taiwan, Province of China
Duration: Jul 24 2017Jul 26 2017

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Other

Other22nd IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2017
CountryTaiwan, Province of China
CityTaipei
Period7/24/177/26/17

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint Dive into the research topics of 'Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition'. Together they form a unique fingerprint.

  • Cite this

    Chang, K., Kadetotad, D., Cao, Y., Seo, J., & Lim, S. K. (2017). Monolithic 3D IC designs for low-power deep neural networks targeting speech recognition. In ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design [8009175] (Proceedings of the International Symposium on Low Power Electronics and Design). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISLPED.2017.8009175