Modeling thermal effects in nano-devices

In current semiconductor integrated circuit (IC) technology, the minimum feature size of transistors is about 22 nm, and the projected size of next generation devices will be well below that. This continued miniaturization of electronic components results in higher heat generation densities inside the device. Non-uniform power distribution across the die surface, and sub-continuum effects cause large temperature gradients and localized hot spots over the die. This overheating of the die surface hinders the performance and reliability of these devices; and therefore, makes thermal management a crucial step for further developments. Herein we discuss the self-heating effects and their implications on the operation of different generations of silicon on insulator devices.