Modeling FinFETs using non-equilibrium green's function formalism

Influence of interface-roughness on device characteristics

H. R. Khan, D. Mamaluy, Dragica Vasileska

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We utilize a fully quantum mechanical transport simulator based on the Contact Block Reduction (CBR) method to investigate the influence of interface roughness in nanoscale FinFET devices. In this work we treat interface roughness by creating a random deviation at ideal Si/SiO2 interface in real space, and then solving quantum transport problem fully self-consistently with the gates for the resulting device potential. We study the influence of interface roughness on device capacitance, drain current, and gate leakage for different regime of operation. Our simulation results show that gate leakage is significantly affected by surface roughness, even though the average oxide thickness remains approximately the same. On the other hand, the on-current is comparatively less sensitive to the interface roughness for FinFET devices with narrow fin width. Furthermore, we And that interface roughness significantly affects both the intrinsic switching speed and, especially, the cut-off frequency of FinFET with narrow fin thickness.

Original languageEnglish (US)
Title of host publication2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Proceedings
Pages695-699
Number of pages5
DOIs
StatePublished - 2007
Event2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007 - Hong Kong, China
Duration: Aug 2 2007Aug 5 2007

Other

Other2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007
CountryChina
CityHong Kong
Period8/2/078/5/07

Fingerprint

Green's function
roughness
Green's functions
Surface roughness
formalism
fins
leakage
Drain current
Cutoff frequency
simulators
FinFET
surface roughness
Capacitance
cut-off
Simulators
capacitance
deviation
Oxides
oxides
simulation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Atomic and Molecular Physics, and Optics

Cite this

Khan, H. R., Mamaluy, D., & Vasileska, D. (2007). Modeling FinFETs using non-equilibrium green's function formalism: Influence of interface-roughness on device characteristics. In 2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Proceedings (pp. 695-699). [4601284] https://doi.org/10.1109/NANO.2007.4601284

Modeling FinFETs using non-equilibrium green's function formalism : Influence of interface-roughness on device characteristics. / Khan, H. R.; Mamaluy, D.; Vasileska, Dragica.

2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Proceedings. 2007. p. 695-699 4601284.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Khan, HR, Mamaluy, D & Vasileska, D 2007, Modeling FinFETs using non-equilibrium green's function formalism: Influence of interface-roughness on device characteristics. in 2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Proceedings., 4601284, pp. 695-699, 2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Hong Kong, China, 8/2/07. https://doi.org/10.1109/NANO.2007.4601284
Khan HR, Mamaluy D, Vasileska D. Modeling FinFETs using non-equilibrium green's function formalism: Influence of interface-roughness on device characteristics. In 2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Proceedings. 2007. p. 695-699. 4601284 https://doi.org/10.1109/NANO.2007.4601284
Khan, H. R. ; Mamaluy, D. ; Vasileska, Dragica. / Modeling FinFETs using non-equilibrium green's function formalism : Influence of interface-roughness on device characteristics. 2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Proceedings. 2007. pp. 695-699
@inproceedings{2d435213e7664a02922db5732e272503,
title = "Modeling FinFETs using non-equilibrium green's function formalism: Influence of interface-roughness on device characteristics",
abstract = "We utilize a fully quantum mechanical transport simulator based on the Contact Block Reduction (CBR) method to investigate the influence of interface roughness in nanoscale FinFET devices. In this work we treat interface roughness by creating a random deviation at ideal Si/SiO2 interface in real space, and then solving quantum transport problem fully self-consistently with the gates for the resulting device potential. We study the influence of interface roughness on device capacitance, drain current, and gate leakage for different regime of operation. Our simulation results show that gate leakage is significantly affected by surface roughness, even though the average oxide thickness remains approximately the same. On the other hand, the on-current is comparatively less sensitive to the interface roughness for FinFET devices with narrow fin width. Furthermore, we And that interface roughness significantly affects both the intrinsic switching speed and, especially, the cut-off frequency of FinFET with narrow fin thickness.",
author = "Khan, {H. R.} and D. Mamaluy and Dragica Vasileska",
year = "2007",
doi = "10.1109/NANO.2007.4601284",
language = "English (US)",
isbn = "1424406080",
pages = "695--699",
booktitle = "2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Proceedings",

}

TY - GEN

T1 - Modeling FinFETs using non-equilibrium green's function formalism

T2 - Influence of interface-roughness on device characteristics

AU - Khan, H. R.

AU - Mamaluy, D.

AU - Vasileska, Dragica

PY - 2007

Y1 - 2007

N2 - We utilize a fully quantum mechanical transport simulator based on the Contact Block Reduction (CBR) method to investigate the influence of interface roughness in nanoscale FinFET devices. In this work we treat interface roughness by creating a random deviation at ideal Si/SiO2 interface in real space, and then solving quantum transport problem fully self-consistently with the gates for the resulting device potential. We study the influence of interface roughness on device capacitance, drain current, and gate leakage for different regime of operation. Our simulation results show that gate leakage is significantly affected by surface roughness, even though the average oxide thickness remains approximately the same. On the other hand, the on-current is comparatively less sensitive to the interface roughness for FinFET devices with narrow fin width. Furthermore, we And that interface roughness significantly affects both the intrinsic switching speed and, especially, the cut-off frequency of FinFET with narrow fin thickness.

AB - We utilize a fully quantum mechanical transport simulator based on the Contact Block Reduction (CBR) method to investigate the influence of interface roughness in nanoscale FinFET devices. In this work we treat interface roughness by creating a random deviation at ideal Si/SiO2 interface in real space, and then solving quantum transport problem fully self-consistently with the gates for the resulting device potential. We study the influence of interface roughness on device capacitance, drain current, and gate leakage for different regime of operation. Our simulation results show that gate leakage is significantly affected by surface roughness, even though the average oxide thickness remains approximately the same. On the other hand, the on-current is comparatively less sensitive to the interface roughness for FinFET devices with narrow fin width. Furthermore, we And that interface roughness significantly affects both the intrinsic switching speed and, especially, the cut-off frequency of FinFET with narrow fin thickness.

UR - http://www.scopus.com/inward/record.url?scp=52949134149&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=52949134149&partnerID=8YFLogxK

U2 - 10.1109/NANO.2007.4601284

DO - 10.1109/NANO.2007.4601284

M3 - Conference contribution

SN - 1424406080

SN - 9781424406081

SP - 695

EP - 699

BT - 2007 7th IEEE International Conference on Nanotechnology - IEEE-NANO 2007, Proceedings

ER -