Modeling and simulation of transistor performance shift under pattern-dependent RTA process

Yun Ye, Frank Liu, Yu Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Rapid-thermal annealing (RTA) is widely used in scaled CMOS fabrication in order to achieve ultra-shallow junction. However, recent results report systematic threshold voltage (V th) change and increased device variation due to the RTA process [1][2]. The amount of such changes further depends on layout pattern density. In this work, a suite of thermal/TCAD simulation and compact models to accurately predict the change of transistor parameters is developed. The modeling results are validated with published silicon data, improving design predictability with advanced manufacturing process.

Original languageEnglish (US)
Title of host publicationDesign for Manufacturability through Design-Process Integration III
DOIs
StatePublished - 2009
EventDesign for Manufacturability through Design-Process Integration III - San Jose, CA, United States
Duration: Feb 26 2009Feb 27 2009

Publication series

NameProceedings of SPIE - The International Society for Optical Engineering
Volume7275
ISSN (Print)0277-786X

Other

OtherDesign for Manufacturability through Design-Process Integration III
CountryUnited States
CitySan Jose, CA
Period2/26/092/27/09

Keywords

  • Dopant activation
  • Layout pattern
  • Physical design
  • Rapid-thermal annealing
  • Threshold voltage variation

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Modeling and simulation of transistor performance shift under pattern-dependent RTA process'. Together they form a unique fingerprint.

Cite this