Modeling and design analysis of 3D vertical resistive memory - A low cost cross-point architecture

Cong Xu, Dimin Niu, Shimeng Yu, Yuan Xie

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Citations (Scopus)

Abstract

Resistive Random Access Memory (ReRAM) is one of the most promising emerging non-volatile memory (NVM) candidates due to its fast read/write speed, excellent scalability and low-power operation. Recently proposed 3D vertical cross-point ReRAM (3D-VRAM) architecture attracts a lot of attention because it offers a cost-competitive solution as NAND Flash replacement. In this work, we first develop an array-level model which includes the geometries and properties of all the components in the 3D structure. The model is capable of analyzing the read/write noise margin of a 3D-VRAM array in the presence of the sneak leakage current and voltage drop. Then we build a system-level design tool that is able to explore the design space with specified constraints and find the optimal design points with different targets. We also study the impact of different design parameters on the array size, bit density, and overall cost-per-bit. Compared to the state-of-the-art 3D horizontal ReRAM (3D-HRAM), the 3D-VRAM shows great cost advantage when stacking more than 16 layers.

Original languageEnglish (US)
Title of host publicationProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Pages825-830
Number of pages6
DOIs
StatePublished - 2014
Event2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Suntec, Singapore
Duration: Jan 20 2014Jan 23 2014

Other

Other2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014
CountrySingapore
CitySuntec
Period1/20/141/23/14

Fingerprint

Data storage equipment
Costs
Memory architecture
Leakage currents
Scalability
Geometry
RRAM
Optimal design
Voltage drop

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design

Cite this

Xu, C., Niu, D., Yu, S., & Xie, Y. (2014). Modeling and design analysis of 3D vertical resistive memory - A low cost cross-point architecture. In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (pp. 825-830). [6742992] https://doi.org/10.1109/ASPDAC.2014.6742992

Modeling and design analysis of 3D vertical resistive memory - A low cost cross-point architecture. / Xu, Cong; Niu, Dimin; Yu, Shimeng; Xie, Yuan.

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2014. p. 825-830 6742992.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Xu, C, Niu, D, Yu, S & Xie, Y 2014, Modeling and design analysis of 3D vertical resistive memory - A low cost cross-point architecture. in Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC., 6742992, pp. 825-830, 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Suntec, Singapore, 1/20/14. https://doi.org/10.1109/ASPDAC.2014.6742992
Xu C, Niu D, Yu S, Xie Y. Modeling and design analysis of 3D vertical resistive memory - A low cost cross-point architecture. In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2014. p. 825-830. 6742992 https://doi.org/10.1109/ASPDAC.2014.6742992
Xu, Cong ; Niu, Dimin ; Yu, Shimeng ; Xie, Yuan. / Modeling and design analysis of 3D vertical resistive memory - A low cost cross-point architecture. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2014. pp. 825-830
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