Abstract
With the speed and power bottleneck in the conventional Von Neumann architecture, the interest in the neuromorphic systems has greatly increased in recent years. To create a highly dense communication network between the preand post-neurons, RRAM devices are used as synapses in the neuromorphic systems due to many advantages including their small sizes and low-power operations. However, due to RRAM reliability issues, in particular soft-errors, the performance of the RRAM-based neuromorphic systems are significantly degraded. In this article, we propose a novel framework for detecting and resolving the degradation in the system performance due to the RRAM reliability soft-errors. The read and write circuits modifications to implement the framework, and their impact on the delay and energy consumption of the neuromorphic system are also discussed in this article. Using a combination of BRIAN and SPICE simulations, we demonstrate that the proposed framework can restore the accuracy of the example RRAM-based neuromorphic system from 43% back to its target value of 91.6% with a minimal impact on the read (< 0.1% and 1.1% increase in the delay and energy respectively) and write (0% and < 0.1% increase in the delay and energy respectively) operations.
Original language | English (US) |
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Title of host publication | GLSVLSI 2017 - Proceedings of the Great Lakes Symposium on VLSI 2017 |
Publisher | Association for Computing Machinery |
Pages | 53-58 |
Number of pages | 6 |
Volume | Part F127756 |
ISBN (Electronic) | 9781450349727 |
DOIs | |
State | Published - May 10 2017 |
Event | 27th Great Lakes Symposium on VLSI, GLSVLSI 2017 - Banff, Canada Duration: May 10 2017 → May 12 2017 |
Other
Other | 27th Great Lakes Symposium on VLSI, GLSVLSI 2017 |
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Country | Canada |
City | Banff |
Period | 5/10/17 → 5/12/17 |
ASJC Scopus subject areas
- Engineering(all)