Misalignment tolerance in the 100-nm T-gate recessed-channel Si nMOSFET

Meng Tao, Feng Gao, Changyuan Chen

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

Misalignment tolerance can be achieved in the 100-nm T-gate recessed-channel Si nMOSFET. The T-shaped gate accommodates channel-to-gate misalignment. Source/drain (S/D) implantation must be performed before gate patterning to achieve misalignment tolerance. The pregate implantation dose required for misalignment tolerance is ∼ 20% of the total S/D dose, so lightly-doped drain can be maintained in this device.

Original languageEnglish (US)
Pages (from-to)2951-2953
Number of pages3
JournalIEEE Transactions on Electron Devices
Volume48
Issue number12
DOIs
StatePublished - Dec 2001
Externally publishedYes

Keywords

  • CMOSFETs
  • MOSFETs
  • Semiconductor device modeling
  • Silicon

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Misalignment tolerance in the 100-nm T-gate recessed-channel Si nMOSFET'. Together they form a unique fingerprint.

Cite this