Misalignment tolerance in the 100-nm T-gate recessed-channel Si nMOSFET

Meng Tao; Feng Gao; Changyuan Chen

doi:10.1109/16.974735

Misalignment tolerance in the 100-nm T-gate recessed-channel Si nMOSFET

Meng Tao, Feng Gao, Changyuan Chen

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

Misalignment tolerance can be achieved in the 100-nm T-gate recessed-channel Si nMOSFET. The T-shaped gate accommodates channel-to-gate misalignment. Source/drain (S/D) implantation must be performed before gate patterning to achieve misalignment tolerance. The pregate implantation dose required for misalignment tolerance is ∼ 20% of the total S/D dose, so lightly-doped drain can be maintained in this device.

Original language	English (US)
Pages (from-to)	2951-2953
Number of pages	3
Journal	IEEE Transactions on Electron Devices
Volume	48
Issue number	12
DOIs	https://doi.org/10.1109/16.974735
State	Published - Dec 2001
Externally published	Yes

Keywords

CMOSFETs
MOSFETs
Semiconductor device modeling
Silicon

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/16.974735

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abstract = "Misalignment tolerance can be achieved in the 100-nm T-gate recessed-channel Si nMOSFET. The T-shaped gate accommodates channel-to-gate misalignment. Source/drain (S/D) implantation must be performed before gate patterning to achieve misalignment tolerance. The pregate implantation dose required for misalignment tolerance is ∼ 20% of the total S/D dose, so lightly-doped drain can be maintained in this device.",

keywords = "CMOSFETs, MOSFETs, Semiconductor device modeling, Silicon",

author = "Meng Tao and Feng Gao and Changyuan Chen",

year = "2001",

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AU - Gao, Feng

AU - Chen, Changyuan

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N2 - Misalignment tolerance can be achieved in the 100-nm T-gate recessed-channel Si nMOSFET. The T-shaped gate accommodates channel-to-gate misalignment. Source/drain (S/D) implantation must be performed before gate patterning to achieve misalignment tolerance. The pregate implantation dose required for misalignment tolerance is ∼ 20% of the total S/D dose, so lightly-doped drain can be maintained in this device.

AB - Misalignment tolerance can be achieved in the 100-nm T-gate recessed-channel Si nMOSFET. The T-shaped gate accommodates channel-to-gate misalignment. Source/drain (S/D) implantation must be performed before gate patterning to achieve misalignment tolerance. The pregate implantation dose required for misalignment tolerance is ∼ 20% of the total S/D dose, so lightly-doped drain can be maintained in this device.

KW - CMOSFETs

KW - MOSFETs

KW - Semiconductor device modeling

KW - Silicon

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Misalignment tolerance in the 100-nm T-gate recessed-channel Si nMOSFET

Abstract

Keywords

ASJC Scopus subject areas

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