Misalignment tolerance in the 100-nm T-gate recessed-channel Si nMOSFET

Meng Tao, Feng Gao, Changyuan Chen

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

Misalignment tolerance can be achieved in the 100-nm T-gate recessed-channel Si nMOSFET. The T-shaped gate accommodates channel-to-gate misalignment. Source/drain (S/D) implantation must be performed before gate patterning to achieve misalignment tolerance. The pregate implantation dose required for misalignment tolerance is ∼ 20% of the total S/D dose, so lightly-doped drain can be maintained in this device.

Original languageEnglish (US)
Pages (from-to)2951-2953
Number of pages3
JournalIEEE Transactions on Electron Devices
Volume48
Issue number12
DOIs
StatePublished - Dec 2001
Externally publishedYes

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misalignment
implantation
dosage

Keywords

  • CMOSFETs
  • MOSFETs
  • Semiconductor device modeling
  • Silicon

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Physics and Astronomy (miscellaneous)

Cite this

Misalignment tolerance in the 100-nm T-gate recessed-channel Si nMOSFET. / Tao, Meng; Gao, Feng; Chen, Changyuan.

In: IEEE Transactions on Electron Devices, Vol. 48, No. 12, 12.2001, p. 2951-2953.

Research output: Contribution to journalArticle

Tao, Meng ; Gao, Feng ; Chen, Changyuan. / Misalignment tolerance in the 100-nm T-gate recessed-channel Si nMOSFET. In: IEEE Transactions on Electron Devices. 2001 ; Vol. 48, No. 12. pp. 2951-2953.
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