Misalignment tolerance can be achieved in the 100-nm T-gate recessed-channel Si nMOSFET. The T-shaped gate accommodates channel-to-gate misalignment. Source/drain (S/D) implantation must be performed before gate patterning to achieve misalignment tolerance. The pregate implantation dose required for misalignment tolerance is ∼ 20% of the total S/D dose, so lightly-doped drain can be maintained in this device.
- Semiconductor device modeling
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Physics and Astronomy (miscellaneous)