Although subthreshold circuits are promising for creating ultra-low power VLSI circuits, they suffer from greatly reduced ION/IOFF ratios when compared to their high voltage counterparts. Fortunately, an analytical model to guide design and ensure robust subthreshold operation is now available. The model closely matches simulation results. It is shown to allow analysis of maximum fan-in/out at fixed supply voltage VDD or to determine the minimum allowable VDD given the circuit fan-out.
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering