Low power baseband processor for IoT terminals with long range wireless communications

Shunyao Wu; Sungmoon Kang; Chaitali Chakrabarti; Hyunseok LEE

doi:10.1109/GlobalSIP.2016.7905938

Low power baseband processor for IoT terminals with long range wireless communications

Shunyao Wu, Sungmoon Kang, Chaitali Chakrabarti, Hyunseok LEE

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Scopus citations

Abstract

In this paper, we propose a new baseband architecture for Internet of Things (IoT) terminals that support long range communications such as those based on Orthogonal Frequency-Division Multiple Access (OFDMA) and spread spectrum technologies. We analyze the workload profiles of both systems and find that the frame detection unit has by far the highest computational load. Based on this analysis, we propose a simple architecture that uses only a scalar datapath. To optimize for low power consumption, we introduce application specific instructions that minimize register accesses and include address generation units for streamlined memory access. Preliminary synthesis results in 65nm node show that this architecture has an area of 0.204 μm² and average energy consumption of 2.41 nJ/cycle when operated at 3MHz with supply voltage of 1.08 V.

Original language	English (US)
Title of host publication	2016 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2016 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	728-732
Number of pages	5
ISBN (Electronic)	9781509045457
DOIs	https://doi.org/10.1109/GlobalSIP.2016.7905938
State	Published - Apr 19 2017
Event	2016 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2016 - Washington, United States Duration: Dec 7 2016 → Dec 9 2016

Other

Other	2016 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2016
Country/Territory	United States
City	Washington
Period	12/7/16 → 12/9/16

Keywords

Baseband processor
IoT
Long range communication
Low power

ASJC Scopus subject areas

Signal Processing
Computer Networks and Communications

Access to Document

10.1109/GlobalSIP.2016.7905938

Cite this

Wu, S., Kang, S., Chakrabarti, C., & LEE, H. (2017). Low power baseband processor for IoT terminals with long range wireless communications. In 2016 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2016 - Proceedings (pp. 728-732). Article 7905938 Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/GlobalSIP.2016.7905938

Low power baseband processor for IoT terminals with long range wireless communications. / Wu, Shunyao; Kang, Sungmoon; Chakrabarti, Chaitali et al.
2016 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2017. p. 728-732 7905938.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Wu, S, Kang, S, Chakrabarti, C & LEE, H 2017, Low power baseband processor for IoT terminals with long range wireless communications. in 2016 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2016 - Proceedings., 7905938, Institute of Electrical and Electronics Engineers Inc., pp. 728-732, 2016 IEEE Global Conference on Signal and Information Processing, GlobalSIP 2016, Washington, United States, 12/7/16. https://doi.org/10.1109/GlobalSIP.2016.7905938

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AB - In this paper, we propose a new baseband architecture for Internet of Things (IoT) terminals that support long range communications such as those based on Orthogonal Frequency-Division Multiple Access (OFDMA) and spread spectrum technologies. We analyze the workload profiles of both systems and find that the frame detection unit has by far the highest computational load. Based on this analysis, we propose a simple architecture that uses only a scalar datapath. To optimize for low power consumption, we introduce application specific instructions that minimize register accesses and include address generation units for streamlined memory access. Preliminary synthesis results in 65nm node show that this architecture has an area of 0.204 μm2 and average energy consumption of 2.41 nJ/cycle when operated at 3MHz with supply voltage of 1.08 V.

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Low power baseband processor for IoT terminals with long range wireless communications

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