Linearity enhancement using a common-drain topology for envelope tracking CMOS power amplifiers

Sumit Bhardwaj, Soroush Moallemi, Jennifer Kitchen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work discusses about the linearity challenges of a radio frequency power amplifier (RF-PA) using envelope tracking (ET) technique. ET modulators vary the supply voltage of a PA to improve its efficiency, but also add undesired ripple at the supply node which affect the PA's linearity. Also, device non-linearities of the PA add distortion to the transmitted signal and degrade its spectral purity. To overcome the aforementioned issues, a fully differential common-drain architecture for the PA is proposed and linearity enhancement is demonstrated in TSMC CMOS 65 nm technology.

Original languageEnglish (US)
Title of host publicationProceedings of the 2020 IEEE Dallas Circuits and Systems Conference, DCAS 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728185101
DOIs
StatePublished - Nov 15 2020
Event14th IEEE Dallas Circuits and Systems Conference, DCAS 2020 - Virtual, Richardson, United States
Duration: Nov 15 2020Nov 16 2020

Publication series

NameProceedings of the 2020 IEEE Dallas Circuits and Systems Conference, DCAS 2020

Conference

Conference14th IEEE Dallas Circuits and Systems Conference, DCAS 2020
CountryUnited States
CityVirtual, Richardson
Period11/15/2011/16/20

Keywords

  • Envelope tracking
  • Inter-modulation distortion
  • Linearity enhancement
  • Power amplifier

ASJC Scopus subject areas

  • Artificial Intelligence
  • Hardware and Architecture
  • Signal Processing
  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering

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