Abstract
The authors review the limits of nanometer-scale gate electrode (nano-gate) fabrication. The technology to fabricate nano-gates has become increasingly important in recent years as the scaling limits of conventional electronic devices and the quantum effects of novel devices are investigated. Consistant with the technology used to fabricate virtually all of the smallest devices to date, the emphasis is on the resolution limits of electron beam lithography and associated ultrahigh resolution resists. Recent results of directly patterning SiO2 with nanometer-scale resolution by e-beam exposure through a sacrifical layer are also presented. Because the high resistance normally associated with nanometer-scale electrodes seriously limits the performance of high-frequency devices, various techniques to reduce the gate resistance are compared.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 1093-1105 |
| Number of pages | 13 |
| Journal | Proceedings of the IEEE |
| Volume | 79 |
| Issue number | 8 |
| DOIs | |
| State | Published - Aug 1991 |
| Externally published | Yes |
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ASJC Scopus subject areas
- Electrical and Electronic Engineering
Cite this
Limits of nano-gate fabrication. / Allee, David; Broers, Alec N.; Pease, R. Fabian W.
In: Proceedings of the IEEE, Vol. 79, No. 8, 08.1991, p. 1093-1105.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Limits of nano-gate fabrication
AU - Allee, David
AU - Broers, Alec N.
AU - Pease, R. Fabian W
PY - 1991/8
Y1 - 1991/8
N2 - The authors review the limits of nanometer-scale gate electrode (nano-gate) fabrication. The technology to fabricate nano-gates has become increasingly important in recent years as the scaling limits of conventional electronic devices and the quantum effects of novel devices are investigated. Consistant with the technology used to fabricate virtually all of the smallest devices to date, the emphasis is on the resolution limits of electron beam lithography and associated ultrahigh resolution resists. Recent results of directly patterning SiO2 with nanometer-scale resolution by e-beam exposure through a sacrifical layer are also presented. Because the high resistance normally associated with nanometer-scale electrodes seriously limits the performance of high-frequency devices, various techniques to reduce the gate resistance are compared.
AB - The authors review the limits of nanometer-scale gate electrode (nano-gate) fabrication. The technology to fabricate nano-gates has become increasingly important in recent years as the scaling limits of conventional electronic devices and the quantum effects of novel devices are investigated. Consistant with the technology used to fabricate virtually all of the smallest devices to date, the emphasis is on the resolution limits of electron beam lithography and associated ultrahigh resolution resists. Recent results of directly patterning SiO2 with nanometer-scale resolution by e-beam exposure through a sacrifical layer are also presented. Because the high resistance normally associated with nanometer-scale electrodes seriously limits the performance of high-frequency devices, various techniques to reduce the gate resistance are compared.
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U2 - 10.1109/5.92069
DO - 10.1109/5.92069
M3 - Article
AN - SCOPUS:0026205602
VL - 79
SP - 1093
EP - 1105
JO - Proceedings of the IEEE
JF - Proceedings of the IEEE
SN - 0018-9219
IS - 8
ER -