This paper proposes and evaluates the LFrWF, a novel lifting-based architecture to compute the discrete wavelet transform (DWT) of images using the fractional wavelet filter (FrWF). In order to reduce the memory requirement of the proposed architecture, only one image line is read into a buffer at a time. Aside from an LFrWF version with multipliers, i.e., the LFrWFm, we develop a multiplier-less LFrWF version, i.e., the LFrWFml, which reduces the critical path delay (CPD) to the delay Ta of an adder. The proposed LFrWFm and LFrWFml architectures are compared in terms of the required adders, multipliers, memory, and critical path delay with state-of-the-art DWT architectures. Moreover, the proposed LFrWFm and LFrWFml architectures, along with the state-of-the-art FrWF architectures (with multipliers (FrWFm) and without multipliers (FrWFml)) are compared through implementation on the same FPGA board. The LFrWFm requires 22% less look-up tables (LUT), 34% less flip-flops (FF), and 50% less compute cycles (CC) and consumes 65% less energy than the FrWFm. Also, the proposed LFrWFml architecture requires 50% less CC and consumes 43% less energy than the FrWFml. Thus, the proposed LFrWFm and LFrWFml architectures appear suitable for computing the DWT of images on wearable sensors.
ASJC Scopus subject areas
- Computer Science(all)