LCSRAM: A leakage controlled six-transistor static random access memory cell with intrinsically high read stability

Sayeed A. Badrudduza, Giby Samson, Lawrence T. Clark

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Highly scaled processes increase leakage and transistor variations, both of which are problematic for SRAM, which is pervasive in modern CMOS integrated circuits. Here, a six transistor SRAM cell is presented that does not suffer from reduced stability when reading. The cell also resides in a low leakage, voltage collapsed, low standby power mode when not being accessed. The cell circuit topology, layout, and impact on memory design are described. Simulation of operation on 130 and 90 nm technologies and with predictive technology models for 65 and 45 nm technologies demonstrate the leakage reduction and measurement on 130 nm demonstrates improved read stability.

Original languageEnglish (US)
Title of host publicationProceedings - 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems
Pages621-626
Number of pages6
DOIs
StatePublished - Dec 1 2007
Event20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems, VLSID'07 - Bangalore, India
Duration: Jan 6 2007Jan 10 2007

Publication series

NameProceedings of the IEEE International Conference on VLSI Design
ISSN (Print)1063-9667

Other

Other20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems, VLSID'07
CountryIndia
CityBangalore
Period1/6/071/10/07

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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