Lazy error detection for microprocessor functional units

Mahmut Yilmaz, Albert Meixner, Sule Ozev, Daniel J. Sorin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Scopus citations

Abstract

We propose and evaluate the use of lazy error detection for a superscalar, out-of-order microprocessor's functional units. The key insight is that error detection is off the critical path, because an instruction's results are speculative for at least a cycle after being computed. The time between computing and committing the results can be used to lazily detect errors, and laziness allows us to use cheaper error detection logic. We show that lazy error detection is feasible, we develop a low-cost mechanism for detecting errors in adders that exploits laziness, and we show that an existing error detection scheme for multipliers can exploit laziness.

Original languageEnglish (US)
Title of host publicationProceedings - 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems, DFT 2007
Pages361-369
Number of pages9
DOIs
StatePublished - Dec 1 2007
Externally publishedYes
Event22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems, DFT 2007 - Rome, Italy
Duration: Sep 26 2007Sep 28 2007

Publication series

NameProceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
ISSN (Print)1550-5774

Other

Other22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems, DFT 2007
CountryItaly
CityRome
Period9/26/079/28/07

ASJC Scopus subject areas

  • Engineering(all)

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