KANSYS: A CAD tool for analog circuit synthesis

Sandeep Gupta, M. M. Hasan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

A CAD tool for the synthesis of analog circuits has been developed. The approach adopted is top down, knowledge intensive hierarchical design. A flattened view of the design is not however lost sight of and design knowledge over various levels of hierarchy is also used to achieve desirable performance. Practical sized transistor circuit designs are synthesized for CMOS OPAMPS and some of the functional circuits from performance and process specifications.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE International Conference on VLSI Design
Place of PublicationLos Alamitos, CA, United States
PublisherIEEE
Pages333-334
Number of pages2
StatePublished - 1996
Externally publishedYes
EventProceedings of the 1996 9th International Conference on VLSI Design - Bangalore, India
Duration: Jan 3 1996Jan 6 1996

Other

OtherProceedings of the 1996 9th International Conference on VLSI Design
CityBangalore, India
Period1/3/961/6/96

ASJC Scopus subject areas

  • Engineering(all)

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