K-Nearest Neighbor Hardware Accelerator Using In-Memory Computing SRAM

Jyotishman Saikia, Shihui Yin, Zhewei Jiang, Mingoo Seok, Jae Sun Seo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

The k-nearest neighbor (kNN) is one of the most popular algorithms in machine learning owing to its simplicity, versatility, and implementation viability without any assumptions about the data. However, for large-scale data, it incurs a large amount of memory access and computational complexity, resulting in long latency and high power consumption. In this paper, we present a kNN hardware accelerator in 65nm CMOS. This accelerator combines in-memory computing SRAM that is recently developed for binarized deep neural networks and digital hardware that performs top-k sorting. We designed and simulated the kNN accelerator, which performs up to 17.9 million query vectors per second while consuming 11.8 mW, demonstrating >4.8X energy improvement over prior works.

Original languageEnglish (US)
Title of host publicationInternational Symposium on Low Power Electronics and Design, ISLPED 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728129549
DOIs
StatePublished - Jul 2019
Event2019 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2019 - Lausanne, Switzerland
Duration: Jul 29 2019Jul 31 2019

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
Volume2019-July
ISSN (Print)1533-4678

Conference

Conference2019 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2019
CountrySwitzerland
CityLausanne
Period7/29/197/31/19

Keywords

  • content addressable memory
  • hardware accelerator
  • in-memory computing
  • k-nearest neighbor

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Saikia, J., Yin, S., Jiang, Z., Seok, M., & Seo, J. S. (2019). K-Nearest Neighbor Hardware Accelerator Using In-Memory Computing SRAM. In International Symposium on Low Power Electronics and Design, ISLPED 2019 [8824822] (Proceedings of the International Symposium on Low Power Electronics and Design; Vol. 2019-July). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISLPED.2019.8824822