TY - GEN
T1 - Investigation of statistical retention of filamentary analog RRAM for neuromophic computing
AU - Zhao, Meiran
AU - Wu, Huaqiang
AU - Gao, Bin
AU - Zhang, Qingtian
AU - Wu, Wei
AU - Wang, Shan
AU - Xi, Yue
AU - Wu, Dong
AU - Deng, Ning
AU - Yu, Shimeng
AU - Chen, Hong Yu
AU - Qian, He
N1 - Funding Information:
This work is supported in part by the China Key Research and Development Program (2016YFA0201801), Beijing Innovation Center for Future Chip (ICFC), Beijing Municipal Science and Technology Project (D161100001716002), and NSFC (61674087, 61674089, 61674092, 61076115).
Funding Information:
This work is supported in part by the China Key Research and Development Program (2016YFA0201801), Beijing Innovation Center for Future Chip (ICFC), Beijing Municipal Science and Technology Project (D161100001716002), and NSFC (61674087, 61674089, 61674092, 61076115). REFERENCES [1] M. Prezioso, et al, “Training and operation of an integrated neuromorphic network based on metal-oxide memristors”, Nature, 521, pp. 61-64, 2015. [2] S. B. Eryilmaz, et al, “Device and System Level Design Considerations for Analog-Non-Volatile-Memory Based Neuromorphic Architectures”, IEDM 2015, 64-67. [3] I-T. Wang, et al, “3D Synaptic Architecture with Ultralow sub-10 fJ Energy per Spike for Neuromorphic Computation”, IEDM 2014, 665-668. [4] D. Lee, et al, “Oxide based nanoscale analog synapse device for neural signal recognition system”, in IEDM 2015, pp. 91-94. [5] P. Yao, et al, “Face classification using electronic synapses”, Nature Communications, 8, 15199, 2017. [6] S. Yu, et al, “A Low Energy Oxide-Based Electronic Synaptic Device for Neuromorphic Visual Systems with Tolerance to Device Variation”, Advanced Materials, 25, 1774-1779, 2013. [7] I. Hubara, et al. “Quantized Neural Networks: Training Neural Networks with Low Precision Weights and Activations”. arXiv:1609.0706, 2016. [8] C. Y. Chen, et al, “Programming-conditions solutions towards suppression of retention tails of scaled Oxide-Based RRAM”, IEDM 2015, 261-264. [9] W. Wu, et al, “Improving Analog Switching in HfOx-Based Resistive Memory with a Thermal Enhanced Layer”, IEEE Electron Device Letters, 38, pp. 1019-1022, 2017.
PY - 2018/1/23
Y1 - 2018/1/23
N2 - The retention requirements of analog RRAM for neuromorphic computing applications are quite different from conventional RRAM for memory applications. Meanwhile, filamentary analog RRAM exhibits different retention behavior in comparison to strong-filament RRAM. For the first time, the statistical behaviors of read current noise and retention in a 1Kb filamentary analog RRAM array are investigated in this work. The conductance distribution of different levels is found to change with time, and the physical mechanism of the retention degradation is elucidated. From the experimental data, a compact model is developed in order to predict the statistical conductance evolution, which can effectively evaluate the impact of read noise and retention degradation in neuromorphic computing systems.
AB - The retention requirements of analog RRAM for neuromorphic computing applications are quite different from conventional RRAM for memory applications. Meanwhile, filamentary analog RRAM exhibits different retention behavior in comparison to strong-filament RRAM. For the first time, the statistical behaviors of read current noise and retention in a 1Kb filamentary analog RRAM array are investigated in this work. The conductance distribution of different levels is found to change with time, and the physical mechanism of the retention degradation is elucidated. From the experimental data, a compact model is developed in order to predict the statistical conductance evolution, which can effectively evaluate the impact of read noise and retention degradation in neuromorphic computing systems.
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U2 - 10.1109/IEDM.2017.8268522
DO - 10.1109/IEDM.2017.8268522
M3 - Conference contribution
AN - SCOPUS:85045201487
T3 - Technical Digest - International Electron Devices Meeting, IEDM
SP - 39.4.1-39.4.4
BT - 2017 IEEE International Electron Devices Meeting, IEDM 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 63rd IEEE International Electron Devices Meeting, IEDM 2017
Y2 - 2 December 2017 through 6 December 2017
ER -