@inbook{5de48062881e4cc8b634b58cc1f17791,
title = "Introduction",
abstract = "To alleviate the complex communication problems that arise as the number of on-chip components increases, network-on-chip (NoC) architectures have been recently proposed to replace global interconnects. This chapter first provides a general description of NoC architectures. Then, it describes a generic synthesis flow for NoCs starting from the application specification through tape-out and applications. Finally, it addresses the interactions among these research problems and put the NoC design process into perspective.",
author = "Ogras, {Umit Y.} and Radu Marculescu",
note = "Copyright: Copyright 2021 Elsevier B.V., All rights reserved.",
year = "2013",
doi = "10.1007/978-94-007-3958-1_1",
language = "English (US)",
isbn = "9789400739574",
series = "Lecture Notes in Electrical Engineering",
publisher = "Springer Verlag",
pages = "1--8",
booktitle = "Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures",
}