Introduction

Umit Y. Ogras, Radu Marculescu

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

To alleviate the complex communication problems that arise as the number of on-chip components increases, network-on-chip (NoC) architectures have been recently proposed to replace global interconnects. This chapter first provides a general description of NoC architectures. Then, it describes a generic synthesis flow for NoCs starting from the application specification through tape-out and applications. Finally, it addresses the interactions among these research problems and put the NoC design process into perspective.

Original languageEnglish (US)
Title of host publicationModeling, Analysis and Optimization of Network-on-Chip Communication Architectures
Pages1-8
Number of pages8
DOIs
StatePublished - Apr 11 2013
Externally publishedYes

Publication series

NameLecture Notes in Electrical Engineering
Volume184
ISSN (Print)1876-1100
ISSN (Electronic)1876-1119

ASJC Scopus subject areas

  • Industrial and Manufacturing Engineering

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  • Cite this

    Ogras, U. Y., & Marculescu, R. (2013). Introduction. In Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures (pp. 1-8). (Lecture Notes in Electrical Engineering; Vol. 184). https://doi.org/10.1007/978-94-007-3958-1-1