INTERNATIONAL SYMPOSIUM ON FAULT-TOLERANT COMPUTING, DIGEST OF PAPERS, PASADENA, CALIF, MAR 1-3 1971.

George C. Gilley, L. W. Bearnson, C. C. Carroll, W. G. Bouricius, E. P. Hsieh, G. R. Putzolu, J. P. Roth, P. R. Schneider, C. J. Tan, M. Y. Hsiao, D. K. Chia, Sik-Sang Yau, Y. S. Tang, M. A. Breuer, J. F. Meyer

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

Collection of 37 papers by various authors. The topics discussed are; tests generation and diagnosis, fault-location and testing, diagnosis and testing, reliability modeling and analysis, architecture and design, error protection and recovery, and software reliability. Following is a list of the titles and authors. On the Design of Minimum Length Fault Tests for Combinational Circuits. By L. W. Bearnson and C. C. Carroll. Algorithms for Detection of Faults in Logic Circuits. By W. G. Bouricius, E. P. Hsieh, G. R. Putzolu, J. P. Roth, P. R. Schneider and C. J. Tan. Boolean Difference for Fault-Detection in Asynchronous Sequential Machines. By M. Y. Hsiao and D. K. Chia. Efficient Algorithm for Generating Complete Test Sets for Combinational Logic Circuits. By S. S. Yau and Y. S Tang. Generation of Fault Detection Tests for Sequential Circuits. By M. A. Breuer. Diagnosable Machine Realizations of Sequential Behavior. By J. F. Meyer and K. Yeh.

Original languageEnglish (US)
Title of host publicationUnknown Host Publication Title
StatePublished - 1800
Externally publishedYes

Fingerprint

Fault tolerant computer systems
Combinatorial circuits
Logic circuits
Fault detection
Sequential machines
Sequential circuits
Software reliability
Electric fault location
Testing
Recovery

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Gilley, G. C., Bearnson, L. W., Carroll, C. C., Bouricius, W. G., Hsieh, E. P., Putzolu, G. R., ... Meyer, J. F. (1800). INTERNATIONAL SYMPOSIUM ON FAULT-TOLERANT COMPUTING, DIGEST OF PAPERS, PASADENA, CALIF, MAR 1-3 1971. In Unknown Host Publication Title

INTERNATIONAL SYMPOSIUM ON FAULT-TOLERANT COMPUTING, DIGEST OF PAPERS, PASADENA, CALIF, MAR 1-3 1971. / Gilley, George C.; Bearnson, L. W.; Carroll, C. C.; Bouricius, W. G.; Hsieh, E. P.; Putzolu, G. R.; Roth, J. P.; Schneider, P. R.; Tan, C. J.; Hsiao, M. Y.; Chia, D. K.; Yau, Sik-Sang; Tang, Y. S.; Breuer, M. A.; Meyer, J. F.

Unknown Host Publication Title. 1800.

Research output: Chapter in Book/Report/Conference proceedingChapter

Gilley, GC, Bearnson, LW, Carroll, CC, Bouricius, WG, Hsieh, EP, Putzolu, GR, Roth, JP, Schneider, PR, Tan, CJ, Hsiao, MY, Chia, DK, Yau, S-S, Tang, YS, Breuer, MA & Meyer, JF 1800, INTERNATIONAL SYMPOSIUM ON FAULT-TOLERANT COMPUTING, DIGEST OF PAPERS, PASADENA, CALIF, MAR 1-3 1971. in Unknown Host Publication Title.
Gilley GC, Bearnson LW, Carroll CC, Bouricius WG, Hsieh EP, Putzolu GR et al. INTERNATIONAL SYMPOSIUM ON FAULT-TOLERANT COMPUTING, DIGEST OF PAPERS, PASADENA, CALIF, MAR 1-3 1971. In Unknown Host Publication Title. 1800
Gilley, George C. ; Bearnson, L. W. ; Carroll, C. C. ; Bouricius, W. G. ; Hsieh, E. P. ; Putzolu, G. R. ; Roth, J. P. ; Schneider, P. R. ; Tan, C. J. ; Hsiao, M. Y. ; Chia, D. K. ; Yau, Sik-Sang ; Tang, Y. S. ; Breuer, M. A. ; Meyer, J. F. / INTERNATIONAL SYMPOSIUM ON FAULT-TOLERANT COMPUTING, DIGEST OF PAPERS, PASADENA, CALIF, MAR 1-3 1971. Unknown Host Publication Title. 1800.
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abstract = "Collection of 37 papers by various authors. The topics discussed are; tests generation and diagnosis, fault-location and testing, diagnosis and testing, reliability modeling and analysis, architecture and design, error protection and recovery, and software reliability. Following is a list of the titles and authors. On the Design of Minimum Length Fault Tests for Combinational Circuits. By L. W. Bearnson and C. C. Carroll. Algorithms for Detection of Faults in Logic Circuits. By W. G. Bouricius, E. P. Hsieh, G. R. Putzolu, J. P. Roth, P. R. Schneider and C. J. Tan. Boolean Difference for Fault-Detection in Asynchronous Sequential Machines. By M. Y. Hsiao and D. K. Chia. Efficient Algorithm for Generating Complete Test Sets for Combinational Logic Circuits. By S. S. Yau and Y. S Tang. Generation of Fault Detection Tests for Sequential Circuits. By M. A. Breuer. Diagnosable Machine Realizations of Sequential Behavior. By J. F. Meyer and K. Yeh.",
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AU - Gilley, George C.

AU - Bearnson, L. W.

AU - Carroll, C. C.

AU - Bouricius, W. G.

AU - Hsieh, E. P.

AU - Putzolu, G. R.

AU - Roth, J. P.

AU - Schneider, P. R.

AU - Tan, C. J.

AU - Hsiao, M. Y.

AU - Chia, D. K.

AU - Yau, Sik-Sang

AU - Tang, Y. S.

AU - Breuer, M. A.

AU - Meyer, J. F.

PY - 1800

Y1 - 1800

N2 - Collection of 37 papers by various authors. The topics discussed are; tests generation and diagnosis, fault-location and testing, diagnosis and testing, reliability modeling and analysis, architecture and design, error protection and recovery, and software reliability. Following is a list of the titles and authors. On the Design of Minimum Length Fault Tests for Combinational Circuits. By L. W. Bearnson and C. C. Carroll. Algorithms for Detection of Faults in Logic Circuits. By W. G. Bouricius, E. P. Hsieh, G. R. Putzolu, J. P. Roth, P. R. Schneider and C. J. Tan. Boolean Difference for Fault-Detection in Asynchronous Sequential Machines. By M. Y. Hsiao and D. K. Chia. Efficient Algorithm for Generating Complete Test Sets for Combinational Logic Circuits. By S. S. Yau and Y. S Tang. Generation of Fault Detection Tests for Sequential Circuits. By M. A. Breuer. Diagnosable Machine Realizations of Sequential Behavior. By J. F. Meyer and K. Yeh.

AB - Collection of 37 papers by various authors. The topics discussed are; tests generation and diagnosis, fault-location and testing, diagnosis and testing, reliability modeling and analysis, architecture and design, error protection and recovery, and software reliability. Following is a list of the titles and authors. On the Design of Minimum Length Fault Tests for Combinational Circuits. By L. W. Bearnson and C. C. Carroll. Algorithms for Detection of Faults in Logic Circuits. By W. G. Bouricius, E. P. Hsieh, G. R. Putzolu, J. P. Roth, P. R. Schneider and C. J. Tan. Boolean Difference for Fault-Detection in Asynchronous Sequential Machines. By M. Y. Hsiao and D. K. Chia. Efficient Algorithm for Generating Complete Test Sets for Combinational Logic Circuits. By S. S. Yau and Y. S Tang. Generation of Fault Detection Tests for Sequential Circuits. By M. A. Breuer. Diagnosable Machine Realizations of Sequential Behavior. By J. F. Meyer and K. Yeh.

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