INTERCONNECTIONS AND LIMITATIONS IN VLSI.

D. K. Ferry, J. M. Golio, R. O. Grondin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Interconnections are felt to be a very fundamental limit to future performance in VLSI. In circuits that are functionally partitioned, the average interconnection length scales with the devices, yielding new concepts for information flow in chips. From this concept, one can talk about hardware and I/O efficiencies which can be used to describe limitations on signal channels and their ability to carry information. Close packing of interconnections also leads to parametric coupling, which gives a filtering of the signals and imposes new limits upon the lines themselves.

Original languageEnglish (US)
Title of host publicationUnknown Host Publication Title
Place of PublicationNew York, NY, USA
PublisherIEEE
Pages408-415
Number of pages8
StatePublished - 1985

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Ferry, D. K., Golio, J. M., & Grondin, R. O. (1985). INTERCONNECTIONS AND LIMITATIONS IN VLSI. In Unknown Host Publication Title (pp. 408-415). IEEE.