INTERCONNECTIONS AND LIMITATIONS IN VLSI.

D. K. Ferry, J. M. Golio, R. O. Grondin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Interconnections are felt to be a very fundamental limit to future performance in VLSI. In circuits that are functionally partitioned, the average interconnection length scales with the devices, yielding new concepts for information flow in chips. From this concept, one can talk about hardware and I/O efficiencies which can be used to describe limitations on signal channels and their ability to carry information. Close packing of interconnections also leads to parametric coupling, which gives a filtering of the signals and imposes new limits upon the lines themselves.

Original languageEnglish (US)
Title of host publicationUnknown Host Publication Title
Place of PublicationNew York, NY, USA
PublisherIEEE
Pages408-415
Number of pages8
StatePublished - 1985

Fingerprint

Hardware
Networks (circuits)

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Ferry, D. K., Golio, J. M., & Grondin, R. O. (1985). INTERCONNECTIONS AND LIMITATIONS IN VLSI. In Unknown Host Publication Title (pp. 408-415). New York, NY, USA: IEEE.

INTERCONNECTIONS AND LIMITATIONS IN VLSI. / Ferry, D. K.; Golio, J. M.; Grondin, R. O.

Unknown Host Publication Title. New York, NY, USA : IEEE, 1985. p. 408-415.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Ferry, DK, Golio, JM & Grondin, RO 1985, INTERCONNECTIONS AND LIMITATIONS IN VLSI. in Unknown Host Publication Title. IEEE, New York, NY, USA, pp. 408-415.
Ferry DK, Golio JM, Grondin RO. INTERCONNECTIONS AND LIMITATIONS IN VLSI. In Unknown Host Publication Title. New York, NY, USA: IEEE. 1985. p. 408-415
Ferry, D. K. ; Golio, J. M. ; Grondin, R. O. / INTERCONNECTIONS AND LIMITATIONS IN VLSI. Unknown Host Publication Title. New York, NY, USA : IEEE, 1985. pp. 408-415
@inproceedings{c8164443fbe144c4b3c3bd0d9a141ae5,
title = "INTERCONNECTIONS AND LIMITATIONS IN VLSI.",
abstract = "Interconnections are felt to be a very fundamental limit to future performance in VLSI. In circuits that are functionally partitioned, the average interconnection length scales with the devices, yielding new concepts for information flow in chips. From this concept, one can talk about hardware and I/O efficiencies which can be used to describe limitations on signal channels and their ability to carry information. Close packing of interconnections also leads to parametric coupling, which gives a filtering of the signals and imposes new limits upon the lines themselves.",
author = "Ferry, {D. K.} and Golio, {J. M.} and Grondin, {R. O.}",
year = "1985",
language = "English (US)",
pages = "408--415",
booktitle = "Unknown Host Publication Title",
publisher = "IEEE",

}

TY - GEN

T1 - INTERCONNECTIONS AND LIMITATIONS IN VLSI.

AU - Ferry, D. K.

AU - Golio, J. M.

AU - Grondin, R. O.

PY - 1985

Y1 - 1985

N2 - Interconnections are felt to be a very fundamental limit to future performance in VLSI. In circuits that are functionally partitioned, the average interconnection length scales with the devices, yielding new concepts for information flow in chips. From this concept, one can talk about hardware and I/O efficiencies which can be used to describe limitations on signal channels and their ability to carry information. Close packing of interconnections also leads to parametric coupling, which gives a filtering of the signals and imposes new limits upon the lines themselves.

AB - Interconnections are felt to be a very fundamental limit to future performance in VLSI. In circuits that are functionally partitioned, the average interconnection length scales with the devices, yielding new concepts for information flow in chips. From this concept, one can talk about hardware and I/O efficiencies which can be used to describe limitations on signal channels and their ability to carry information. Close packing of interconnections also leads to parametric coupling, which gives a filtering of the signals and imposes new limits upon the lines themselves.

UR - http://www.scopus.com/inward/record.url?scp=0022185205&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0022185205&partnerID=8YFLogxK

M3 - Conference contribution

SP - 408

EP - 415

BT - Unknown Host Publication Title

PB - IEEE

CY - New York, NY, USA

ER -