Instruction level power model of microcontrollers

Chaitali Chakrabarti, Dinesh Gaitonde

Research output: Chapter in Book/Report/Conference proceedingConference contribution

19 Scopus citations

Abstract

In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the system, a good instruction-level energy model is essential. In this paper we present a methodology for instruction level modelling of microcontrollers using gate level power estimation tools. We use the microcontroller, M68HC11, to illustrate this method. We study two different implementations of the microcontroller and show that the energy consumption of each instruction is quite different. Our study reveals that data correlation does not significantly affect the energy consumption of most instructions. Finally, we show the correctness of this model by running some sample programs and showing that the predicted energy estimates are quite close to the actual estimates.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherIEEE
PagesI-76 - I-79
ISBN (Print)0780354729
StatePublished - Jan 1 1999
EventProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99 - Orlando, FL, USA
Duration: May 30 1999Jun 2 1999

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume1
ISSN (Print)0271-4310

Other

OtherProceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99
CityOrlando, FL, USA
Period5/30/996/2/99

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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