TY - GEN
T1 - Influence of thermal stress and kinetic bias stress on the electrical performance of mixed oxide thin film transistors
AU - Vemuri, Rajitha N P
AU - Alford, Terry
PY - 2013
Y1 - 2013
N2 - This study discusses thermally activated defects in the channel layer of indium zinc oxide (IZO) thin film transistors (TFTs) under electrical and thermal stress resembling practical stress scenarios. Operating temperatures of 20, 50, and 80 °C have been chosen to establish a relation between temperature and failure mechanism. With increasing stress period, acceptor- and donor-like traps contribute towards degrading drain current and subthreshold swing. Low temperature long hour anneal for 12, 24, 36, 48 and 60 hr at 150 °C are performed on the TFTs post fabrication to cure the defects formed during fabrication. Structures treated for 48 hr demonstrate high stability under extended kinetic stresses, maintaining a high transistor Ion/Ioff ratio of ∼ 108. A physicallybased mathematical model discusses the reduction in the density of acceptor-like trap states by 50 % for TFTs treated for 12 hrs, and to insignificant numbers for TFTs treated for 48 hr.
AB - This study discusses thermally activated defects in the channel layer of indium zinc oxide (IZO) thin film transistors (TFTs) under electrical and thermal stress resembling practical stress scenarios. Operating temperatures of 20, 50, and 80 °C have been chosen to establish a relation between temperature and failure mechanism. With increasing stress period, acceptor- and donor-like traps contribute towards degrading drain current and subthreshold swing. Low temperature long hour anneal for 12, 24, 36, 48 and 60 hr at 150 °C are performed on the TFTs post fabrication to cure the defects formed during fabrication. Structures treated for 48 hr demonstrate high stability under extended kinetic stresses, maintaining a high transistor Ion/Ioff ratio of ∼ 108. A physicallybased mathematical model discusses the reduction in the density of acceptor-like trap states by 50 % for TFTs treated for 12 hrs, and to insignificant numbers for TFTs treated for 48 hr.
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U2 - 10.1149/05008.0161ecst
DO - 10.1149/05008.0161ecst
M3 - Conference contribution
AN - SCOPUS:84885715608
SN - 9781607683568
T3 - ECS Transactions
SP - 161
EP - 166
BT - Thin Film Transistors 11, TFT 2012
PB - Electrochemical Society Inc.
T2 - 11th Symposium on Thin Film Transistor Technologies, TFT 2012 - PRiME 2012
Y2 - 8 October 2012 through 10 October 2012
ER -