The authors utilize a fully quantum mechanical transport simulator based on the contact block reduction method to investigate the influence of interface roughness in nanoscale FinFET devices. In this work we treat interface roughness by creating a random deviation at the ideal SiSi O2 interface in real space and then solving the quantum transport problem fully self-consistently with the gates for the resulting device potential. We study the influence of interface roughness on device capacitance, drain current, and gate leakage for different regimes of operation. Our simulation results show that gate leakage is significantly affected by surface roughness, even though the average oxide thickness remains approximately the same. On the other hand, the on current is comparatively less sensitive to the interface roughness for FinFET devices with a narrow fin width. Furthermore, we find that the interface roughness significantly affects both the intrinsic switching speed and, especially, the cutoff frequency of FinFET with a narrow fin thickness.
|Original language||English (US)|
|Number of pages||4|
|Journal||Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures|
|State||Published - Aug 7 2007|
ASJC Scopus subject areas
- Condensed Matter Physics
- Electrical and Electronic Engineering