Abstract

We report the effect of low temperature long anneals on the performance and elevated temperature stability of low temperature fabricated indium zinc oxide (IZO) thin film transistors (TFTs). We have found that there is an optimum annealing time of 48 hours for the best performance and elevated temperature stability. The 48 hour annealed TFTs showed a stable turn-on voltage, and sub-threshold swing with operation temperatures when compared to the as-fabricated TFTs. The performance/stability improvements are attributed to the reduction in trap-state-density at the semiconductor/insulator interface, and curing of the defects states in the band-gap of IZO.

Original languageEnglish (US)
Title of host publicationECS Transactions
Pages337-344
Number of pages8
Volume33
Edition5
DOIs
StatePublished - 2010
Event10th Symposium on Thin Film Transistor Technologies, TFT 10 - 218th ECS Meeting - Las Vegas, NV, United States
Duration: Oct 11 2010Oct 15 2010

Other

Other10th Symposium on Thin Film Transistor Technologies, TFT 10 - 218th ECS Meeting
CountryUnited States
CityLas Vegas, NV
Period10/11/1010/15/10

Fingerprint

Thin film transistors
Zinc oxide
Indium
Oxide films
Thermodynamic stability
Annealing
Temperature
Curing
Energy gap
Semiconductor materials
Defects
Electric potential

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Improved thermal stability of indium zinc oxide TFTs by low temperature post annealing. / Indluru, A.; Alford, Terry.

ECS Transactions. Vol. 33 5. ed. 2010. p. 337-344.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Indluru, A & Alford, T 2010, Improved thermal stability of indium zinc oxide TFTs by low temperature post annealing. in ECS Transactions. 5 edn, vol. 33, pp. 337-344, 10th Symposium on Thin Film Transistor Technologies, TFT 10 - 218th ECS Meeting, Las Vegas, NV, United States, 10/11/10. https://doi.org/10.1149/1.3481256
@inproceedings{f0c3c0ea714b49da9343896593081fb4,
title = "Improved thermal stability of indium zinc oxide TFTs by low temperature post annealing",
abstract = "We report the effect of low temperature long anneals on the performance and elevated temperature stability of low temperature fabricated indium zinc oxide (IZO) thin film transistors (TFTs). We have found that there is an optimum annealing time of 48 hours for the best performance and elevated temperature stability. The 48 hour annealed TFTs showed a stable turn-on voltage, and sub-threshold swing with operation temperatures when compared to the as-fabricated TFTs. The performance/stability improvements are attributed to the reduction in trap-state-density at the semiconductor/insulator interface, and curing of the defects states in the band-gap of IZO.",
author = "A. Indluru and Terry Alford",
year = "2010",
doi = "10.1149/1.3481256",
language = "English (US)",
isbn = "9781566778244",
volume = "33",
pages = "337--344",
booktitle = "ECS Transactions",
edition = "5",

}

TY - GEN

T1 - Improved thermal stability of indium zinc oxide TFTs by low temperature post annealing

AU - Indluru, A.

AU - Alford, Terry

PY - 2010

Y1 - 2010

N2 - We report the effect of low temperature long anneals on the performance and elevated temperature stability of low temperature fabricated indium zinc oxide (IZO) thin film transistors (TFTs). We have found that there is an optimum annealing time of 48 hours for the best performance and elevated temperature stability. The 48 hour annealed TFTs showed a stable turn-on voltage, and sub-threshold swing with operation temperatures when compared to the as-fabricated TFTs. The performance/stability improvements are attributed to the reduction in trap-state-density at the semiconductor/insulator interface, and curing of the defects states in the band-gap of IZO.

AB - We report the effect of low temperature long anneals on the performance and elevated temperature stability of low temperature fabricated indium zinc oxide (IZO) thin film transistors (TFTs). We have found that there is an optimum annealing time of 48 hours for the best performance and elevated temperature stability. The 48 hour annealed TFTs showed a stable turn-on voltage, and sub-threshold swing with operation temperatures when compared to the as-fabricated TFTs. The performance/stability improvements are attributed to the reduction in trap-state-density at the semiconductor/insulator interface, and curing of the defects states in the band-gap of IZO.

UR - http://www.scopus.com/inward/record.url?scp=79952643470&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=79952643470&partnerID=8YFLogxK

U2 - 10.1149/1.3481256

DO - 10.1149/1.3481256

M3 - Conference contribution

AN - SCOPUS:79952643470

SN - 9781566778244

VL - 33

SP - 337

EP - 344

BT - ECS Transactions

ER -