Abstract
In this paper, we discuss the implementation of the BCH decoder Chien search algorithm on a SIMD style programmable baseband processor with minimum memory footprint and processing time degradation. Due to the emergence of long BCH codes, the computational efficiency of the Chien search algorithm becomes a major implementation issue for BCH decoders. We minimize the memory usage and processing time of the BCH decoders by deriving a computation rule, which is used to efficiently generate the power terms of primitive elements upon the SIMD datapath, instead of storing all pre-computed terms in the memory.
Original language | English (US) |
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Pages (from-to) | 1637-1647 |
Number of pages | 11 |
Journal | IEICE Electronics Express |
Volume | 9 |
Issue number | 21 |
DOIs | |
State | Published - 2012 |
Keywords
- BCH decoder
- Chien search algorithm
- Programmable baseband processor
- SIMD
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering