Impact of Read Disturb on Multilevel RRAM based Inference Engine: Experiments and Model Prediction

Wonbo Shim, Yandong Luo, Jae Sun Seo, Shimeng Yu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

23 Scopus citations

Abstract

Different from the multilevel cell (MLC) memory where the crossover between tail bits matters, any drift of the conductance of the synaptic device induced by read disturb may aggregate, as the analog current is summed up along the column. In this work, we experimentally measured the conductance drift on 2-bit HfO2 RRAM array based on 1-transsitor-1-resistor (1T1R) test vehicle. The drift behavior of different states is modeled by vertical and lateral filament growth and saturation. The device model is incorporated into a VGG-like convolutional neural network algorithm for CIFAR-10 dataset. Read voltage should be minimized to 0.3V or below to maintain the inference accuracy.

Original languageEnglish (US)
Title of host publication2020 IEEE International Reliability Physics Symposium, IRPS 2020 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728131993
DOIs
StatePublished - Apr 2020
Event2020 IEEE International Reliability Physics Symposium, IRPS 2020 - Virtual, Online, United States
Duration: Apr 28 2020May 30 2020

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
Volume2020-April
ISSN (Print)1541-7026

Conference

Conference2020 IEEE International Reliability Physics Symposium, IRPS 2020
Country/TerritoryUnited States
CityVirtual, Online
Period4/28/205/30/20

Keywords

  • Multilevel RRAM
  • in-memory computing
  • neural network inference
  • read disturb

ASJC Scopus subject areas

  • General Engineering

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