TY - GEN
T1 - Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design
AU - Cao, Yu
AU - Huang, Xuejue
AU - Sylvester, Dennis
AU - King, Tsu Jae
AU - Hu, Chenming
N1 - Publisher Copyright:
© 2002 IEEE.
PY - 2002
Y1 - 2002
N2 - On-chip interconnect exhibits clear frequency-dependence in both resistance and inductance. A compact ladder circuit model is developed to capture this behavior, and we examine its impact on digital and RF circuit design. It is demonstrated that the use of DC values for R and L is sufficient for delay analysis, but RL frequency dependence is critical for the analysis of signal integrity, shield line insertion, power supply stability, and RF inductor performance.
AB - On-chip interconnect exhibits clear frequency-dependence in both resistance and inductance. A compact ladder circuit model is developed to capture this behavior, and we examine its impact on digital and RF circuit design. It is demonstrated that the use of DC values for R and L is sufficient for delay analysis, but RL frequency dependence is critical for the analysis of signal integrity, shield line insertion, power supply stability, and RF inductor performance.
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U2 - 10.1109/ASIC.2002.1158099
DO - 10.1109/ASIC.2002.1158099
M3 - Conference contribution
AN - SCOPUS:29244484901
T3 - Proceedings of the Annual IEEE International ASIC Conference and Exhibit
SP - 438
EP - 442
BT - Proceedings - 15th Annual IEEE International ASIC/SOC Conference, ASIC/SOC 2002
A2 - Chickanosky, John
A2 - Krishnamurthy, Ram K.
A2 - Mukund, P.R.
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 15th Annual IEEE International ASIC/SOC Conference, ASIC/SOC 2002
Y2 - 25 September 2002 through 28 September 2002
ER -