Abstract
On-chip global interconnect exhibits clear frequency dependence in both resistance (R) and inductance (L). In this paper, its impact on modern digital and radio frequency (RF) circuit design is examined. First, a physical and compact ladder circuit model is developed to capture this behavior, which only employs frequency independent R and L elements, and thus, supports transient analysis. Using this new model we demonstrate that the use of dc values for R and L is sufficient for timing analysis (i.e., 50% delay and slew rate) in digital designs. However, RL frequency dependence is critical for the analysis of signal integrity, shield line insertion, power supply stability, and RF inductor performance.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 158-162 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| Volume | 13 |
| Issue number | 1 |
| DOIs | |
| State | Published - Jan 1 2005 |
Keywords
- Delay
- Frequency-dependence
- Inductance
- Noise
- Over-shoot
- Quality factor
- Resistance
- Slew rate
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering
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Cite this
Cao, Y., Huang, X., Sylvester, D., King, T. J., & Hu, C. (2005). Impact of on-chip interconnect frequency-dependent R(f) L(f) on digital and RF design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 13(1), 158-162. https://doi.org/10.1109/TVLSI.2004.840399