TY - GEN
T1 - Hybrid network on chip (HNoC)
T2 - 12th ACM/IEEE International Workshop on System Level Interconnect Prediction, SLIP'10
AU - Zarkesh-Ha, Payman
AU - Bezerra, George B.P.
AU - Forrest, Stephanie
AU - Moses, Melanie
PY - 2010
Y1 - 2010
N2 - Network on chip (NoC) is often implemented with packetbased communication rather than bus connections between cores. Although NoC is a good solution for long-distance communication, local buses are more efficient for short-distance connections. In this paper, we propose a hybrid network on chip (HNoC) fabric that uses local buses for nearest-neighbor communication and the standard NoC topology for global interconnection. Local buses carry all the nearest-neighbor traffic, reducing traffic on the global network, which results in increased throughput and reduced energy consumption. Based on a communication probability density (CPD) function derived from Rent's rule, it is shown that in a 25-core chip multiprocessor, HNoC can remove up to 78% of the traffic from the global NoC topology, which results in 4.6x higher throughput and a 58% reduction in energy consumption compared to a conventional NoC topology.
AB - Network on chip (NoC) is often implemented with packetbased communication rather than bus connections between cores. Although NoC is a good solution for long-distance communication, local buses are more efficient for short-distance connections. In this paper, we propose a hybrid network on chip (HNoC) fabric that uses local buses for nearest-neighbor communication and the standard NoC topology for global interconnection. Local buses carry all the nearest-neighbor traffic, reducing traffic on the global network, which results in increased throughput and reduced energy consumption. Based on a communication probability density (CPD) function derived from Rent's rule, it is shown that in a 25-core chip multiprocessor, HNoC can remove up to 78% of the traffic from the global NoC topology, which results in 4.6x higher throughput and a 58% reduction in energy consumption compared to a conventional NoC topology.
KW - Global mesh
KW - Hybrid network on chip
KW - Local buses
KW - Network traffic
KW - Stochastic model
KW - Throughput
UR - http://www.scopus.com/inward/record.url?scp=77954947805&partnerID=8YFLogxK
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U2 - 10.1145/1811100.1811104
DO - 10.1145/1811100.1811104
M3 - Conference contribution
AN - SCOPUS:77954947805
SN - 9781450300377
T3 - International Workshop on System Level Interconnect Prediction, SLIP
SP - 9
EP - 14
BT - SLIP'10 - Proceedings of the 2010 Workshop on System Level Interconnect Prediction
Y2 - 13 June 2010 through 13 June 2010
ER -