High-voltage CMOS compatible SOI MESFET characterization and spice model extraction

Asha Balijepalli, Joseph Ervin, Punarvasu Joshi, Jinman Yang, Yu Cao, Trevor Thornton

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

A mature and well-established SOI CMOS process has been used to fabricate metal-semiconductor field-effect transistors (MESFETs) that operate in the gigahertz range. These 0.6μm depletion-mode SOI MESFETs exhibit a maximum breakdown voltage of 45V in spite of being fabricated using the standard 3.3V CMOS process. This high voltage capability makes the device a strong contender for applications such as power amplifiers, voltage controlled oscillators and DC-DC converters. DC and RF characterization involving breakdown voltage measurements, S-parameter measurements and small-signal parameter extraction was conducted on the device. We have customized an advanced, commercially available TOM3 SPICE MESFET model to represent the SOI MESFET. Based on extracted small-signal parameters, a simplified method to extract the charge parameters of the TOM3 capacitance model was developed. A diode subcircuit has been proposed to model the breakdown mechanism in the SOI MESFET.

Original languageEnglish (US)
Title of host publicationIEEE MTT-S International Microwave Symposium Digest
Pages1335-1338
Number of pages4
DOIs
StatePublished - 2006
Event2006 IEEE MTT-S International Microwave Symposium Digest - San Francisco, CA, United States
Duration: Jun 11 2006Jun 16 2006

Other

Other2006 IEEE MTT-S International Microwave Symposium Digest
CountryUnited States
CitySan Francisco, CA
Period6/11/066/16/06

Fingerprint

MESFET devices
SOI (semiconductors)
high voltages
CMOS
field effect transistors
Electric potential
metals
direct current
Electric breakdown
breakdown
Parameter extraction
voltage controlled oscillators
Voltage measurement
Variable frequency oscillators
Scattering parameters
DC-DC converters
SPICE
power amplifiers
Power amplifiers
electrical faults

Keywords

  • Electric breakdown
  • MESFETs
  • Silicon on insulator technology
  • SPICE

ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Cite this

Balijepalli, A., Ervin, J., Joshi, P., Yang, J., Cao, Y., & Thornton, T. (2006). High-voltage CMOS compatible SOI MESFET characterization and spice model extraction. In IEEE MTT-S International Microwave Symposium Digest (pp. 1335-1338). [4015171] https://doi.org/10.1109/MWSYM.2006.249495

High-voltage CMOS compatible SOI MESFET characterization and spice model extraction. / Balijepalli, Asha; Ervin, Joseph; Joshi, Punarvasu; Yang, Jinman; Cao, Yu; Thornton, Trevor.

IEEE MTT-S International Microwave Symposium Digest. 2006. p. 1335-1338 4015171.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Balijepalli, A, Ervin, J, Joshi, P, Yang, J, Cao, Y & Thornton, T 2006, High-voltage CMOS compatible SOI MESFET characterization and spice model extraction. in IEEE MTT-S International Microwave Symposium Digest., 4015171, pp. 1335-1338, 2006 IEEE MTT-S International Microwave Symposium Digest, San Francisco, CA, United States, 6/11/06. https://doi.org/10.1109/MWSYM.2006.249495
Balijepalli A, Ervin J, Joshi P, Yang J, Cao Y, Thornton T. High-voltage CMOS compatible SOI MESFET characterization and spice model extraction. In IEEE MTT-S International Microwave Symposium Digest. 2006. p. 1335-1338. 4015171 https://doi.org/10.1109/MWSYM.2006.249495
Balijepalli, Asha ; Ervin, Joseph ; Joshi, Punarvasu ; Yang, Jinman ; Cao, Yu ; Thornton, Trevor. / High-voltage CMOS compatible SOI MESFET characterization and spice model extraction. IEEE MTT-S International Microwave Symposium Digest. 2006. pp. 1335-1338
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