TY - JOUR
T1 - High-temperature stability and enhanced performance of a-Si:H TFT on flexible substrate due to improved interface quality
AU - Indluru, Anil
AU - Alford, Terry
N1 - Funding Information:
Manuscript received March 31, 2010; revised July 28, 2010; accepted July 30, 2010. Date of publication September 23, 2010; date of current version November 5, 2010. This work was supported in part by the National Science Foundation (L. Hess, Grant DMR-0902277) and in part by the Army Research Laboratory under Cooperative Agreement W911NG-04-2-0005. The review of this paper was arranged by Editor H.-S. Tae.
PY - 2010/11
Y1 - 2010/11
N2 - We have investigated the effect of anneal time on the performance and temperature-dependent stability of low-temperature-fabricated (180 °C) hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) on flexible substrates. For TFTs annealed for 48 h, the subthreshold slope and off-current were reduced by a factor of ∼3 and by two orders of magnitude, respectively, when compared to unannealed TFTs. Furthermore, longer annealed TFTs showed a significant improvement in their stability when compared to unannealed TFTs. The lifetime values for the 48- and 96-h-annealed TFTs improved by a factor of ∼3 compared to unannealed TFTs when the threshold voltage shift is extrapolated to 10 V. Stability at high temperatures with better lifetimes for the longer annealed TFTs is due to improvement in the a-Si:H/SiNx interface quality by the reduction of trapped charges inside the insulator. For all the TFTs at a positive gate bias, ΔVt follows a power law dependence with time, indicating state creation. A low β value (0.6 for unannealed TFTs to 0.37 for 96-h-annealed TFTs) indicates a good-quality a-Si:H channel and/or the a-Si:H/insulator interface after longer anneals.
AB - We have investigated the effect of anneal time on the performance and temperature-dependent stability of low-temperature-fabricated (180 °C) hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) on flexible substrates. For TFTs annealed for 48 h, the subthreshold slope and off-current were reduced by a factor of ∼3 and by two orders of magnitude, respectively, when compared to unannealed TFTs. Furthermore, longer annealed TFTs showed a significant improvement in their stability when compared to unannealed TFTs. The lifetime values for the 48- and 96-h-annealed TFTs improved by a factor of ∼3 compared to unannealed TFTs when the threshold voltage shift is extrapolated to 10 V. Stability at high temperatures with better lifetimes for the longer annealed TFTs is due to improvement in the a-Si:H/SiNx interface quality by the reduction of trapped charges inside the insulator. For all the TFTs at a positive gate bias, ΔVt follows a power law dependence with time, indicating state creation. A low β value (0.6 for unannealed TFTs to 0.37 for 96-h-annealed TFTs) indicates a good-quality a-Si:H channel and/or the a-Si:H/insulator interface after longer anneals.
KW - a-Si:H
KW - flexible electronics
KW - low temperature annealing
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U2 - 10.1109/TED.2010.2067733
DO - 10.1109/TED.2010.2067733
M3 - Article
AN - SCOPUS:78049255798
SN - 0018-9383
VL - 57
SP - 3006
EP - 3011
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 11
M1 - 5582273
ER -