High Resolution, Multi-layer Resistance for Microlithography and Method

Michael Kozicki (Inventor)

Research output: Patent

Abstract

The rapid movement toward higher levels of integration in monolithic circuits and systems has been made possible by increased component packing densities and smaller geometries within the devices and circuits. The reduced feature sizes within circuits are a result of advances in lithographic techniques. For instance, advanced lithography systems now use shorter wavelength light sources and high numerical aperture lenses to achieve sub-micron resolution. The minimum feature size as determined by the capabilities of the system optics and the contrast value of the photoresist is, to this day significantly larger than the resolution capability of the optics due to limitations in the photoresist itself.Researchers at Arizona State University have developed a new high resolution, multilayer resist for use in microlithography in integrated circuit manufacture. This resist system is entirely different from conventional polymeric systems. The resist material consists of a very thin photosensitive layer containing arsenic sulfide followed by a layer of silver which can be sputtered. Upon exposure, the silver diffuses into the arsenic sulfide creating a ternary compound. Due to the mechanism of action and the extremely thin coating capability of the active material, this system is capable of resolutions far superior to those of conventional polymeric resists. For more detailed information, please refer to US Patent No. 5,314,772.
Original languageEnglish (US)
StatePublished - Jan 1 1900

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