High open circuit voltage (Voc) is a potential benefit of thin silicon solar cells. A new thin silicon solar cell structure is proposed using silicon-on-insulator (SOI) technology that investigates the properties of high voltage in thin silicon designs with an epitaxial emitter. Key design parameters are low rear and front surface recombination, low dark current and efficient light trapping. We propose a patterned emitter area on a SOI substrate. The advantages of this design are the passivation properties embedded in the buried oxide and the reduced junction area. With a uniform epitaxial emitter, the top contact shadowing can be designed to be 0%. Preliminary results show V oc >525mV and JSC>20mA/cm2 with-anti-reflection coating. This represents a substantial increase from previous work by Danos et al. which reported Voc <500mV and JSC∼0. 45mAlcm2 . This present design also demonstrates the effect of a smaller emitter area and reports higher performance parameters for reported silicon cells fabricated on SOI substrates.