High fan-in circuit design

Lawrence T. Clark; Gregory F. Taylor

doi:10.1109/4.485870

High fan-in circuit design

Lawrence T. Clark, Gregory F. Taylor

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

A review of high fan-in circuit design in contemporary logic technologies is presented. This is followed by a description of BiNMOS circuit structures which allow the construction of large fan-in, logical AND or OR functions. The first is a dynamic design, while the second is static. Application of the former in a 3.3 V, 100 MHz, implementation of the Pentium™ Microprocessor [1] on a 0.6 μm BiNMOS process [2] is described, while application of the latter in a 0.35 μm BiNMOS implementation is presented. Power and reliability considerations such as bipolar junction transistors (BJT), reverse V_be, and MOS hot electron protection are included.

Original language	English (US)
Pages (from-to)	91-96
Number of pages	6
Journal	IEEE Journal of Solid-State Circuits
Volume	31
Issue number	1
DOIs	https://doi.org/10.1109/4.485870
State	Published - Jan 1996

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/4.485870

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High fan-in circuit design

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