High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS

Jae Sun Seo, Ron Ho, Jon Lexau, Michael Dayringer, Dennis Sylvester, David Blaauw

Research output: Chapter in Book/Report/Conference proceedingConference contribution

43 Scopus citations

Abstract

Long on-chip wires pose well-known latency, bandwidth, and energy challenges to the designers of high-performance VLSI systems. Repeaters effectively mitigate wire RC effects but do little to improve their energy costs. Moreover, proliferating repeater farms add significant complexity to full-chip integration, motivating circuits to improve wire performance and energy while reducing the number of repeaters. Such methods include capacitive-mode signaling, which combines a capacitive driver with a capacitive load [1,2]; and current-mode signaling, which pairs a resistive driver with a resistive load [3,4]. While both can significantly improve wire performance, capacitive drivers offer added benefits of reduced voltage swing on the wire and intrinsic driver pre-emphasis. As wires scale, slow slew rates on highly resistive interconnects will still limit wire performance due to inter-symbol interference (ISI) [5]. Further improvements can come from equalization circuits on receivers [2] and transmitters [4] that trade off power for bandwidth. In this paper, we extend these ideas to a capacitively driven pulse-mode wire using a transmit-side adaptive FIR filter and a clockless receiver, and show bandwidth densities of 2.2-4.4 Gb/s/μm over 90nm 5mm links, with corresponding energies of 0.24-0.34 pJ/bit on random data.

Original languageEnglish (US)
Title of host publication2010 IEEE International Solid-State Circuits Conference, ISSCC 2010 - Digest of Technical Papers
Pages182-183
Number of pages2
DOIs
StatePublished - May 18 2010
Externally publishedYes
Event2010 IEEE International Solid-State Circuits Conference, ISSCC 2010 - San Francisco, CA, United States
Duration: Feb 7 2010Feb 11 2010

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume53
ISSN (Print)0193-6530

Other

Other2010 IEEE International Solid-State Circuits Conference, ISSCC 2010
CountryUnited States
CitySan Francisco, CA
Period2/7/102/11/10

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS'. Together they form a unique fingerprint.

  • Cite this

    Seo, J. S., Ho, R., Lexau, J., Dayringer, M., Sylvester, D., & Blaauw, D. (2010). High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS. In 2010 IEEE International Solid-State Circuits Conference, ISSCC 2010 - Digest of Technical Papers (pp. 182-183). [5433993] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 53). https://doi.org/10.1109/ISSCC.2010.5433993