III-V/silicon solar cells which have an active silicon bottom solar cell are promising for multi-junction solar cell applications. In such solar cell structures, a high minority carrier lifetime in the bulk silicon substrate is necessary. Annealing silicon wafers at high temperature (≥ 500°C) in the molecular beam epitaxy (MBE) high-vacuum chamber revealed significant lifetime degradation. In this work, we developed a practical method to maintain high Si bulk lifetime. SiNx layer deposited on Si back side helps maintain millisecond level minority carrier lifetime. By this procedure high minority carrier lifetime in the Si substrate is preserved while high quality thin GaP layer is achieved. We demonstrate GaP as a hetero-emitter layer with high Si bulk lifetime in GaP/Si structure solar cell with 524mV open circuit voltage.

Original languageEnglish (US)
Title of host publication2017 IEEE 44th Photovoltaic Specialist Conference, PVSC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages4
ISBN (Electronic)9781509056057
StatePublished - May 25 2018
Event44th IEEE Photovoltaic Specialist Conference, PVSC 2017 - Washington, United States
Duration: Jun 25 2017Jun 30 2017


Other44th IEEE Photovoltaic Specialist Conference, PVSC 2017
CountryUnited States


  • Annealing
  • Gallium Phosphide
  • Hetero-emitter
  • MBE growth
  • Minority carrier lifetime
  • Silicon substrate
  • SiNx

ASJC Scopus subject areas

  • Renewable Energy, Sustainability and the Environment
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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