Hermes: Secure heterogeneous multicore architecture design

Michel A. Kinsy, Shreeya Khadka, Mihailo Isakov, Anam Farrukh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

12 Scopus citations

Abstract

The emergence of general-purpose system-on-chip (SoC) architectures has given rise to a number of significant security challenges. The current trend in SoC design is system-level integration of heterogeneous technologies consisting of a large number of processing elements such as programmable RISC cores, memory, DSPs, and accelerator function units/ASIC. These processing elements may come from different providers, and application executable code may have varying levels of trust. Some of the pressing architecture design questions are: (1) how to implement multi-level user-defined security; (2) how to optimally and securely share resources and data among processing elements. In this work, we develop a secure multicore architecture, named Hermes. It represents a new architectural framework that integrates multiple processing elements (called tenants) of secure and non-secure cores into the same chip design while (a) maintaining individual tenant security, (b) preventing data leakage and corruption, and (c) promoting collaboration among the tenants. The Hermes architecture is based on a programmable secure router interface and a trust-aware routing algorithm. With 17% hardware overhead, it enables the implementation of processing-element-oblivious secure multicore systems with a programmable distributed group key management scheme.

Original languageEnglish (US)
Title of host publicationProceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages14-20
Number of pages7
ISBN (Electronic)9781538639283
DOIs
StatePublished - Jun 16 2017
Externally publishedYes
Event10th IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2017 - McLean, United States
Duration: May 1 2017May 5 2017

Publication series

NameProceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2017

Conference

Conference10th IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2017
Country/TerritoryUnited States
CityMcLean
Period5/1/175/5/17

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality

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