Heap data management for limited local memory (LLM) multi-core processors

Research output: Chapter in Book/Report/Conference proceedingConference contribution

29 Citations (Scopus)

Abstract

This paper presents a scheme to manage heap data in the local memory present in each core of a limited local memory (LLM) multi-core processor. While it is possible to manage heap data semi-automatically using software cache, managing heap data of a core through software cache may require changing the code of the other threads. Cross thread modifications are difficult to code and debug, and only become more difficult as we scale the number of cores. We propose a semi-automatic, and scalable scheme for heap data management that hides this complexity in a library with a much natural programming interface. Furthermore, for embedded applications, where the maximum heap size can be known at compile time, we propose optimizations on the heap management to significantly improve the application performance. Experiments on several benchmarks of MiBench executing on the Sony Playstation 3 show that our scheme is easier to use, and if we know the maximum size of heap data, then our optimizations can improve application performance by an average of 14%.

Original languageEnglish (US)
Title of host publication2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2010
Pages317-325
Number of pages9
StatePublished - 2010
Event8th IEEE/ACM International Conference on Hardware/Software-Co-Design and System Synthesis, CODES+ISSS 2010 - Scottsdale, AZ, United States
Duration: Oct 24 2010Oct 29 2010

Other

Other8th IEEE/ACM International Conference on Hardware/Software-Co-Design and System Synthesis, CODES+ISSS 2010
CountryUnited States
CityScottsdale, AZ
Period10/24/1010/29/10

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Experiments

Keywords

  • embedded systems
  • Heap
  • IBM Cell
  • local memory
  • MPI
  • multi-core processor
  • PS3
  • scratch pad memory

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software
  • Electrical and Electronic Engineering

Cite this

Bai, K., & Shrivastava, A. (2010). Heap data management for limited local memory (LLM) multi-core processors. In 2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2010 (pp. 317-325). [5751516]

Heap data management for limited local memory (LLM) multi-core processors. / Bai, Ke; Shrivastava, Aviral.

2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2010. 2010. p. 317-325 5751516.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bai, K & Shrivastava, A 2010, Heap data management for limited local memory (LLM) multi-core processors. in 2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2010., 5751516, pp. 317-325, 8th IEEE/ACM International Conference on Hardware/Software-Co-Design and System Synthesis, CODES+ISSS 2010, Scottsdale, AZ, United States, 10/24/10.
Bai K, Shrivastava A. Heap data management for limited local memory (LLM) multi-core processors. In 2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2010. 2010. p. 317-325. 5751516
Bai, Ke ; Shrivastava, Aviral. / Heap data management for limited local memory (LLM) multi-core processors. 2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2010. 2010. pp. 317-325
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