Hardware-software bipartitioning for dynamically reconfigurable systems

Daler N. Rakhmatov, Sarma B K Vrudhula

Research output: Chapter in Book/Report/Conference proceedingConference contribution

17 Scopus citations

Abstract

The main unique feature of dynamically reconfigurable systems is the ability to time-share the same reconfigurable hardware resources. However, the energy-delay cost associated with reconfiguration must be accounted for during hardware-software partitioning. We propose a method for mapping nodes of an application control flow graph either to software or reconfigurable hardware, explicitly targeting minimization of the energy-delay cost due to both computation and configuration. The addressed problems are energy-delay product minimization, delay-constrained energy minimization, and energy-constrained delay minimization. We show how these problems can be tackled by using network flow techniques, after transforming the original control flow graph into an equivalent network. If there are no constraints, as in the case of the energy-delay product minimization, we are able to generate an optimal solution in polynomial time.

Original languageEnglish (US)
Title of host publicationHardware/Software Codesign - Proceedings of the International Workshop
Pages145-150
Number of pages6
StatePublished - 2002
Externally publishedYes
EventProceedings of the Tenth International Symposium on Hardware/Software Codesign: CODES 2002 - Estes Park, CO, United States
Duration: May 6 2002May 8 2002

Other

OtherProceedings of the Tenth International Symposium on Hardware/Software Codesign: CODES 2002
CountryUnited States
CityEstes Park, CO
Period5/6/025/8/02

Keywords

  • Hardware-software partitioning
  • Networks flows
  • Reconfigurable systems

ASJC Scopus subject areas

  • Hardware and Architecture

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