Hardware-efficient neighbor-guided SGM optical flow for low power vision applications

Jiang Xiang, Ziyun Li, Hun Seok Kim, Chaitali Chakrabarti

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

Many real-time vision applications require accurate estimation of optical flow. This problem is quite challenging due to extremely high computation and memory bandwidth requirements. This paper presents a parallel block-based optical flow algorithm along with an optimized multicore hardware architecture. The algorithm is based on neighbor-guided semiglobal matching (NG-fSGM), a dynamic programming algorithm that aggressively prunes search space using flow vector information of the neighboring pixels. In the block based NGfSGM, the image is divided into overlapping blocks and the blocks are processed in parallel for high throughput. While large overlap between blocks improves the accuracy, it results in larger memory and higher computational complexity. To minimize the amount of overlap among blocks with minimal effect on the accuracy, we use temporal prediction to guide flow vectors along the block boundaries. A pseudo-random flow candidate selection technique is also introduced to reduce memory access bandwidth and computation requirements. The proposed algorithm is mapped onto a multicore architecture where each core has a high degree of internal parallelism and implements a prefetching technique to improve throughput and reduce memory latency. The proposed hardware-efficient algorithm and the corresponding architecture achieve significant gains in throughput, latency, and power efficiency with only 1.25% accuracy degradation compared to the original NG-fSGM when evaluated on the Middlebury dataset.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Workshop on Signal Processing Systems, SiPS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1-6
Number of pages6
ISBN (Electronic)9781509033614
DOIs
StatePublished - Dec 9 2016
Event2016 IEEE International Workshop on Signal Processing Systems, SiPS 2016 - Dallas, United States
Duration: Oct 26 2016Oct 28 2016

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
ISSN (Print)1520-6130

Other

Other2016 IEEE International Workshop on Signal Processing Systems, SiPS 2016
Country/TerritoryUnited States
CityDallas
Period10/26/1610/28/16

Keywords

  • Multi-core
  • Optical flow
  • Semi-global matching

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Signal Processing
  • Applied Mathematics
  • Hardware and Architecture

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