@article{be2796ff21c648b5a344a52c9293be24,
title = "Guest editors{\textquoteright} introduction: Hardware and algorithms for energy-constrained on-chip machine learning (part 2)",
author = "Seo, {Jae Sun} and Yu Cao and Xin Li and Paul Whatmough",
note = "Funding Information: With the support of the ACM Special Interest Group in Design Automation and the IEEE Council of Electronic Design Automation, we organized the third workshop on Hardware and Algorithms for Learning On-a-chip (HALO) in 2017. Our workshop promoted close interaction between hardware design and cognitive/learning algorithms. To address the rapid progress in this field, this special issue solicits high-quality presentations from HALO 2017. In addition, a general call for papers was distributed to the research community in order to solicit a broader range of research works on energy-efficient on-chip machine-learning algorithm and hardware designs. After the peer review process, the guest editors decided to split the special issue into two parts. For the second part of this special issue, the following six papers were accepted for publication: 1. Hardware Optimizations of Hyperdimensional Computing: Rematerialization of Hypervectors, Binarized Bundling, and Combinational Associative Memory",
year = "2019",
month = dec,
doi = "10.1145/3359336",
language = "English (US)",
volume = "15",
journal = "ACM Journal on Emerging Technologies in Computing Systems",
issn = "1550-4832",
publisher = "Association for Computing Machinery (ACM)",
number = "4",
}